diff options
author | James Morris <jmorris@namei.org> | 2009-02-06 11:01:45 +1100 |
---|---|---|
committer | James Morris <jmorris@namei.org> | 2009-02-06 11:01:45 +1100 |
commit | cb5629b10d64a8006622ce3a52bc887d91057d69 (patch) | |
tree | 7c06d8f30783115e3384721046258ce615b129c5 /arch/m68k/include/asm/mvme16xhw.h | |
parent | 8920d5ad6ba74ae8ab020e90cc4d976980e68701 (diff) | |
parent | f01d1d546abb2f4028b5299092f529eefb01253a (diff) |
Merge branch 'master' into next
Conflicts:
fs/namei.c
Manually merged per:
diff --cc fs/namei.c
index 734f2b5,bbc15c2..0000000
--- a/fs/namei.c
+++ b/fs/namei.c
@@@ -860,9 -848,8 +849,10 @@@ static int __link_path_walk(const char
nd->flags |= LOOKUP_CONTINUE;
err = exec_permission_lite(inode);
if (err == -EAGAIN)
- err = vfs_permission(nd, MAY_EXEC);
+ err = inode_permission(nd->path.dentry->d_inode,
+ MAY_EXEC);
+ if (!err)
+ err = ima_path_check(&nd->path, MAY_EXEC);
if (err)
break;
@@@ -1525,14 -1506,9 +1509,14 @@@ int may_open(struct path *path, int acc
flag &= ~O_TRUNC;
}
- error = vfs_permission(nd, acc_mode);
+ error = inode_permission(inode, acc_mode);
if (error)
return error;
+
- error = ima_path_check(&nd->path,
++ error = ima_path_check(path,
+ acc_mode & (MAY_READ | MAY_WRITE | MAY_EXEC));
+ if (error)
+ return error;
/*
* An append-only file must be opened in append mode for writing.
*/
Signed-off-by: James Morris <jmorris@namei.org>
Diffstat (limited to 'arch/m68k/include/asm/mvme16xhw.h')
-rw-r--r-- | arch/m68k/include/asm/mvme16xhw.h | 111 |
1 files changed, 111 insertions, 0 deletions
diff --git a/arch/m68k/include/asm/mvme16xhw.h b/arch/m68k/include/asm/mvme16xhw.h new file mode 100644 index 00000000000..6117f56653d --- /dev/null +++ b/arch/m68k/include/asm/mvme16xhw.h @@ -0,0 +1,111 @@ +#ifndef _M68K_MVME16xHW_H_ +#define _M68K_MVME16xHW_H_ + +#include <asm/irq.h> + +/* Board ID data structure - pointer to this retrieved from Bug by head.S */ + +/* Note, bytes 12 and 13 are board no in BCD (0162,0166,0167,0177,etc) */ + +extern long mvme_bdid_ptr; + +typedef struct { + char bdid[4]; + u_char rev, mth, day, yr; + u_short size, reserved; + u_short brdno; + char brdsuffix[2]; + u_long options; + u_short clun, dlun, ctype, dnum; + u_long option2; +} t_bdid, *p_bdid; + + +typedef struct { + u_char ack_icr, + flt_icr, + sel_icr, + pe_icr, + bsy_icr, + spare1, + isr, + cr, + spare2, + spare3, + spare4, + data; +} MVMElp, *MVMElpPtr; + +#define MVME_LPR_BASE 0xfff42030 + +#define mvmelp ((*(volatile MVMElpPtr)(MVME_LPR_BASE))) + +typedef struct { + unsigned char + ctrl, + bcd_sec, + bcd_min, + bcd_hr, + bcd_dow, + bcd_dom, + bcd_mth, + bcd_year; +} MK48T08_t, *MK48T08ptr_t; + +#define RTC_WRITE 0x80 +#define RTC_READ 0x40 +#define RTC_STOP 0x20 + +#define MVME_RTC_BASE 0xfffc1ff8 + +#define MVME_I596_BASE 0xfff46000 + +#define MVME_SCC_A_ADDR 0xfff45005 +#define MVME_SCC_B_ADDR 0xfff45001 +#define MVME_SCC_PCLK 10000000 + +#define MVME162_IRQ_TYPE_PRIO 0 + +#define MVME167_IRQ_PRN (IRQ_USER+20) +#define MVME16x_IRQ_I596 (IRQ_USER+23) +#define MVME16x_IRQ_SCSI (IRQ_USER+21) +#define MVME16x_IRQ_FLY (IRQ_USER+63) +#define MVME167_IRQ_SER_ERR (IRQ_USER+28) +#define MVME167_IRQ_SER_MODEM (IRQ_USER+29) +#define MVME167_IRQ_SER_TX (IRQ_USER+30) +#define MVME167_IRQ_SER_RX (IRQ_USER+31) +#define MVME16x_IRQ_TIMER (IRQ_USER+25) +#define MVME167_IRQ_ABORT (IRQ_USER+46) +#define MVME162_IRQ_ABORT (IRQ_USER+30) + +/* SCC interrupts, for MVME162 */ +#define MVME162_IRQ_SCC_BASE (IRQ_USER+0) +#define MVME162_IRQ_SCCB_TX (IRQ_USER+0) +#define MVME162_IRQ_SCCB_STAT (IRQ_USER+2) +#define MVME162_IRQ_SCCB_RX (IRQ_USER+4) +#define MVME162_IRQ_SCCB_SPCOND (IRQ_USER+6) +#define MVME162_IRQ_SCCA_TX (IRQ_USER+8) +#define MVME162_IRQ_SCCA_STAT (IRQ_USER+10) +#define MVME162_IRQ_SCCA_RX (IRQ_USER+12) +#define MVME162_IRQ_SCCA_SPCOND (IRQ_USER+14) + +/* MVME162 version register */ + +#define MVME162_VERSION_REG 0xfff4202e + +extern unsigned short mvme16x_config; + +/* Lower 8 bits must match the revision register in the MC2 chip */ + +#define MVME16x_CONFIG_SPEED_32 0x0001 +#define MVME16x_CONFIG_NO_VMECHIP2 0x0002 +#define MVME16x_CONFIG_NO_SCSICHIP 0x0004 +#define MVME16x_CONFIG_NO_ETHERNET 0x0008 +#define MVME16x_CONFIG_GOT_FPU 0x0010 + +#define MVME16x_CONFIG_GOT_LP 0x0100 +#define MVME16x_CONFIG_GOT_CD2401 0x0200 +#define MVME16x_CONFIG_GOT_SCCA 0x0400 +#define MVME16x_CONFIG_GOT_SCCB 0x0800 + +#endif |