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authorIngo Molnar <mingo@elte.hu>2009-02-04 14:54:56 +0100
committerIngo Molnar <mingo@elte.hu>2009-02-04 14:54:56 +0100
commitbb960a1e42042e82447a5bc0941b3ab6d614bac3 (patch)
treed2295a923fabb1b01b25bb015c4c2e42ee9df5ca /arch/m68k/include/asm/nettel.h
parent858770619debfb9269add63e4ba8b7c6b5538dd1 (diff)
parent06fc732c33a7ff5e4c91bcf4a6ca86b5e335ad9a (diff)
Merge branch 'core/xen' into x86/urgent
Diffstat (limited to 'arch/m68k/include/asm/nettel.h')
-rw-r--r--arch/m68k/include/asm/nettel.h108
1 files changed, 108 insertions, 0 deletions
diff --git a/arch/m68k/include/asm/nettel.h b/arch/m68k/include/asm/nettel.h
new file mode 100644
index 00000000000..0299f6a2dee
--- /dev/null
+++ b/arch/m68k/include/asm/nettel.h
@@ -0,0 +1,108 @@
+/****************************************************************************/
+
+/*
+ * nettel.h -- Lineo (formerly Moreton Bay) NETtel support.
+ *
+ * (C) Copyright 1999-2000, Moreton Bay (www.moretonbay.com)
+ * (C) Copyright 2000-2001, Lineo Inc. (www.lineo.com)
+ * (C) Copyright 2001-2002, SnapGear Inc., (www.snapgear.com)
+ */
+
+/****************************************************************************/
+#ifndef nettel_h
+#define nettel_h
+/****************************************************************************/
+
+
+/****************************************************************************/
+#ifdef CONFIG_NETtel
+/****************************************************************************/
+
+#ifdef CONFIG_COLDFIRE
+#include <asm/coldfire.h>
+#include <asm/mcfsim.h>
+#endif
+
+/*---------------------------------------------------------------------------*/
+#if defined(CONFIG_M5307)
+/*
+ * NETtel/5307 based hardware first. DTR/DCD lines are wired to
+ * GPIO lines. Most of the LED's are driver through a latch
+ * connected to CS2.
+ */
+#define MCFPP_DCD1 0x0001
+#define MCFPP_DCD0 0x0002
+#define MCFPP_DTR1 0x0004
+#define MCFPP_DTR0 0x0008
+
+#define NETtel_LEDADDR 0x30400000
+
+#ifndef __ASSEMBLY__
+
+extern volatile unsigned short ppdata;
+
+/*
+ * These functions defined to give quasi generic access to the
+ * PPIO bits used for DTR/DCD.
+ */
+static __inline__ unsigned int mcf_getppdata(void)
+{
+ volatile unsigned short *pp;
+ pp = (volatile unsigned short *) (MCF_MBAR + MCFSIM_PADAT);
+ return((unsigned int) *pp);
+}
+
+static __inline__ void mcf_setppdata(unsigned int mask, unsigned int bits)
+{
+ volatile unsigned short *pp;
+ pp = (volatile unsigned short *) (MCF_MBAR + MCFSIM_PADAT);
+ ppdata = (ppdata & ~mask) | bits;
+ *pp = ppdata;
+}
+#endif
+
+/*---------------------------------------------------------------------------*/
+#elif defined(CONFIG_M5206e)
+/*
+ * NETtel/5206e based hardware has leds on latch on CS3.
+ * No support modem for lines??
+ */
+#define NETtel_LEDADDR 0x50000000
+
+/*---------------------------------------------------------------------------*/
+#elif defined(CONFIG_M5272)
+/*
+ * NETtel/5272 based hardware. DTR/DCD lines are wired to GPB lines.
+ */
+#define MCFPP_DCD0 0x0080
+#define MCFPP_DCD1 0x0000 /* Port 1 no DCD support */
+#define MCFPP_DTR0 0x0040
+#define MCFPP_DTR1 0x0000 /* Port 1 no DTR support */
+
+#ifndef __ASSEMBLY__
+/*
+ * These functions defined to give quasi generic access to the
+ * PPIO bits used for DTR/DCD.
+ */
+static __inline__ unsigned int mcf_getppdata(void)
+{
+ volatile unsigned short *pp;
+ pp = (volatile unsigned short *) (MCF_MBAR + MCFSIM_PBDAT);
+ return((unsigned int) *pp);
+}
+
+static __inline__ void mcf_setppdata(unsigned int mask, unsigned int bits)
+{
+ volatile unsigned short *pp;
+ pp = (volatile unsigned short *) (MCF_MBAR + MCFSIM_PBDAT);
+ *pp = (*pp & ~mask) | bits;
+}
+#endif
+
+#endif
+/*---------------------------------------------------------------------------*/
+
+/****************************************************************************/
+#endif /* CONFIG_NETtel */
+/****************************************************************************/
+#endif /* nettel_h */