diff options
author | Greg Ungerer <gerg@uclinux.org> | 2012-04-17 15:37:05 +1000 |
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committer | Greg Ungerer <gerg@uclinux.org> | 2012-05-20 21:22:05 +1000 |
commit | 9f8c8c072dd0ce0c76dfd2277169f933b0cc6ca5 (patch) | |
tree | edf49c01b3763462dfb88efe66057e6ad36a61eb /arch/m68k/platform/coldfire/m5407.c | |
parent | 136f148f61fb7d53f104abcf827a90bf8fa6c8f7 (diff) |
m68knommu: move the 5407 platform code into the common ColdFire code directory
All these separate directories for each ColdFire CPU SoC varient seems like
overkill. The majority of them only contain a single small config file. Move
these into the common ColdFire code directory.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Diffstat (limited to 'arch/m68k/platform/coldfire/m5407.c')
-rw-r--r-- | arch/m68k/platform/coldfire/m5407.c | 42 |
1 files changed, 42 insertions, 0 deletions
diff --git a/arch/m68k/platform/coldfire/m5407.c b/arch/m68k/platform/coldfire/m5407.c new file mode 100644 index 00000000000..faa6680b340 --- /dev/null +++ b/arch/m68k/platform/coldfire/m5407.c @@ -0,0 +1,42 @@ +/***************************************************************************/ + +/* + * linux/arch/m68knommu/platform/5407/config.c + * + * Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com) + * Copyright (C) 2000, Lineo (www.lineo.com) + */ + +/***************************************************************************/ + +#include <linux/kernel.h> +#include <linux/param.h> +#include <linux/init.h> +#include <linux/io.h> +#include <asm/machdep.h> +#include <asm/coldfire.h> +#include <asm/mcfsim.h> +#include <asm/mcfgpio.h> + +/***************************************************************************/ + +struct mcf_gpio_chip mcf_gpio_chips[] = { + MCFGPS(PP, 0, 16, MCFSIM_PADDR, MCFSIM_PADAT, MCFSIM_PADAT), +}; + +unsigned int mcf_gpio_chips_size = ARRAY_SIZE(mcf_gpio_chips); + +/***************************************************************************/ + +void __init config_BSP(char *commandp, int size) +{ + mach_sched_init = hw_timer_init; + + /* Only support the external interrupts on their primary level */ + mcf_mapirq2imr(25, MCFINTC_EINT1); + mcf_mapirq2imr(27, MCFINTC_EINT3); + mcf_mapirq2imr(29, MCFINTC_EINT5); + mcf_mapirq2imr(31, MCFINTC_EINT7); +} + +/***************************************************************************/ |