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authorGreg Ungerer <gerg@uclinux.org>2012-09-18 14:51:46 +1000
committerGreg Ungerer <gerg@uclinux.org>2012-09-27 23:34:03 +1000
commit944c3d81dbead14725e7d12675c37a2027760608 (patch)
tree3531830148ee9ec29bb590c356aca1e3ae25655c /arch/m68k/platform
parent632306f2454bf46c71d4fb7a499916d942b22a32 (diff)
m68knommu: clean up ColdFire 54xx General Timer definitions
Convert the ColdFire 54xx CPU General Timer register address definitions to include the MCF_MBAR peripheral region offset. This makes them consistent with all other 54xx address register definitions (in m54xxsim.h). The goal is to reduce different definitions used (some including offsets and others not) causing bugs when used incorrectly. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Diffstat (limited to 'arch/m68k/platform')
-rw-r--r--arch/m68k/platform/coldfire/m54xx.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/m68k/platform/coldfire/m54xx.c b/arch/m68k/platform/coldfire/m54xx.c
index 1f7c7fd83e2..b587bf35175 100644
--- a/arch/m68k/platform/coldfire/m54xx.c
+++ b/arch/m68k/platform/coldfire/m54xx.c
@@ -44,10 +44,10 @@ static void mcf54xx_reset(void)
{
/* disable interrupts and enable the watchdog */
asm("movew #0x2700, %sr\n");
- __raw_writel(0, MCF_MBAR + MCF_GPT_GMS0);
- __raw_writel(MCF_GPT_GCIR_CNT(1), MCF_MBAR + MCF_GPT_GCIR0);
+ __raw_writel(0, MCF_GPT_GMS0);
+ __raw_writel(MCF_GPT_GCIR_CNT(1), MCF_GPT_GCIR0);
__raw_writel(MCF_GPT_GMS_WDEN | MCF_GPT_GMS_CE | MCF_GPT_GMS_TMS(4),
- MCF_MBAR + MCF_GPT_GMS0);
+ MCF_GPT_GMS0);
}
/***************************************************************************/