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authorAlexander Stein <alexander.stein@systec-electronic.com>2013-06-05 13:42:39 +0200
committerGreg Ungerer <gerg@uclinux.org>2013-08-26 16:51:13 +1000
commit42cb38bcb7a2a8f3a12bf4721e708476daf4f190 (patch)
treedf88018df489762bb52c87c22e4baf8922a4c51a /arch/m68k
parentdf592eb5dc07c5df26a16318ed4bf2f96fa38a4d (diff)
m68k/coldfire: flush cache when creating the signal stack frame
When the signal stack frame is created, it must be flushed in order to make sure the cache fetches the correct data. Without cache flush the icache might pick up old cached data from an older signal stack frame if the signal is raised again very fast. In case of copyback the data cache muist be pushed first, but is untested. Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Diffstat (limited to 'arch/m68k')
-rw-r--r--arch/m68k/kernel/signal.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/m68k/kernel/signal.c b/arch/m68k/kernel/signal.c
index 2a16df3d931..57fd286e4b0 100644
--- a/arch/m68k/kernel/signal.c
+++ b/arch/m68k/kernel/signal.c
@@ -50,6 +50,7 @@
#include <asm/pgtable.h>
#include <asm/traps.h>
#include <asm/ucontext.h>
+#include <asm/cacheflush.h>
#ifdef CONFIG_MMU
@@ -181,6 +182,13 @@ static inline void push_cache (unsigned long vaddr)
asm volatile ("movec %0,%%caar\n\t"
"movec %1,%%cacr"
: : "r" (vaddr + 4), "r" (temp));
+ } else {
+ /* CPU_IS_COLDFIRE */
+#if defined(CONFIG_CACHE_COPYBACK)
+ flush_cf_dcache(0, DCACHE_MAX_ADDR);
+#endif
+ /* Invalidate instruction cache for the pushed bytes */
+ clear_cf_icache(vaddr, vaddr + 8);
}
}