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authorLinus Torvalds <torvalds@linux-foundation.org>2009-09-17 09:52:43 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2009-09-17 09:52:43 -0700
commit66bc4a6f34a950c7aede597c578352c3eba82017 (patch)
treed8005bd9abc0209cff47072d7e48cf19fddc52f5 /arch/m68knommu/platform/5249/config.c
parent96c015b75feaaa67c8744229937bd9c35919d16b (diff)
parent2985709d7f3078c7609ae7f16affc0fb478d7d7a (diff)
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu: (53 commits) m68knommu: Make PAGE_SIZE available to assembly files. m68knommu: fix ColdFire definition of CLOCK_TICK_RATE m68knommu: set multi-function pins for ethernet when enabled m68knommu: remove special interrupt handling code for ne2k support m68knommu: relax IO_SPACE_LIMIT setting m68knommu: remove ColdFire direct interrupt register access m68knommu: create a speciailized ColdFire 5272 interrupt controller m68knommu: add support for second interrupt controller of ColdFire 5249 m68knommu: clean up old ColdFire timer irq setup m68knommu: map ColdFire interrupts to correct masking bits m68knommu: clean up ColdFire 532x CPU timer setup m68knommu: simplify ColdFire "timers" clock initialization m68knommu: support code to mask external interrupts on old ColdFire CPU's m68knommu: merge old ColdFire interrupt controller masking macros m68knommu: remove duplicate ColdFire mcf_autovector() code m68knommu: move ColdFire INTC definitions to new include file m68knommu: mask off all interrupts in ColdFire intc-simr controller m68knommu: remove timer device interrupt setup for ColdFire 532x m68knommu: remove interrupt masking from ColdFire pit timer m68knommu: remove unecessary interrupt level setting in ColdFire 520x setup ...
Diffstat (limited to 'arch/m68knommu/platform/5249/config.c')
-rw-r--r--arch/m68knommu/platform/5249/config.c49
1 files changed, 16 insertions, 33 deletions
diff --git a/arch/m68knommu/platform/5249/config.c b/arch/m68knommu/platform/5249/config.c
index 93d99882592..646f5ba462f 100644
--- a/arch/m68knommu/platform/5249/config.c
+++ b/arch/m68knommu/platform/5249/config.c
@@ -48,11 +48,11 @@ static void __init m5249_uart_init_line(int line, int irq)
if (line == 0) {
writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR);
writeb(irq, MCF_MBAR + MCFUART_BASE1 + MCFUART_UIVR);
- mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART1);
+ mcf_mapirq2imr(irq, MCFINTC_UART0);
} else if (line == 1) {
writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR);
writeb(irq, MCF_MBAR + MCFUART_BASE2 + MCFUART_UIVR);
- mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART2);
+ mcf_mapirq2imr(irq, MCFINTC_UART1);
}
}
@@ -65,38 +65,21 @@ static void __init m5249_uarts_init(void)
m5249_uart_init_line(line, m5249_uart_platform[line].irq);
}
-
/***************************************************************************/
-void mcf_autovector(unsigned int vec)
+static void __init m5249_timers_init(void)
{
- volatile unsigned char *mbar;
-
- if ((vec >= 25) && (vec <= 31)) {
- mbar = (volatile unsigned char *) MCF_MBAR;
- vec = 0x1 << (vec - 24);
- *(mbar + MCFSIM_AVR) |= vec;
- mcf_setimr(mcf_getimr() & ~vec);
- }
-}
-
-/***************************************************************************/
-
-void mcf_settimericr(unsigned int timer, unsigned int level)
-{
- volatile unsigned char *icrp;
- unsigned int icr, imr;
-
- if (timer <= 2) {
- switch (timer) {
- case 2: icr = MCFSIM_TIMER2ICR; imr = MCFSIM_IMR_TIMER2; break;
- default: icr = MCFSIM_TIMER1ICR; imr = MCFSIM_IMR_TIMER1; break;
- }
-
- icrp = (volatile unsigned char *) (MCF_MBAR + icr);
- *icrp = MCFSIM_ICR_AUTOVEC | (level << 2) | MCFSIM_ICR_PRI3;
- mcf_setimr(mcf_getimr() & ~imr);
- }
+ /* Timer1 is always used as system timer */
+ writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI3,
+ MCF_MBAR + MCFSIM_TIMER1ICR);
+ mcf_mapirq2imr(MCF_IRQ_TIMER, MCFINTC_TIMER1);
+
+#ifdef CONFIG_HIGHPROFILE
+ /* Timer2 is to be used as a high speed profile timer */
+ writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3,
+ MCF_MBAR + MCFSIM_TIMER2ICR);
+ mcf_mapirq2imr(MCF_IRQ_PROFILER, MCFINTC_TIMER2);
+#endif
}
/***************************************************************************/
@@ -114,15 +97,15 @@ void m5249_cpu_reset(void)
void __init config_BSP(char *commandp, int size)
{
- mcf_setimr(MCFSIM_IMR_MASKALL);
mach_reset = m5249_cpu_reset;
+ m5249_timers_init();
+ m5249_uarts_init();
}
/***************************************************************************/
static int __init init_BSP(void)
{
- m5249_uarts_init();
platform_add_devices(m5249_devices, ARRAY_SIZE(m5249_devices));
return 0;
}