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authorRalf Baechle <ralf@linux-mips.org>2012-12-13 19:40:13 +0100
committerRalf Baechle <ralf@linux-mips.org>2012-12-13 19:40:13 +0100
commit241738bd51cb0efe58e6c570223153e970afe3ae (patch)
tree05263e1ec3fbd58cc4ba5ee69163612fbb769a4a /arch/mips/Kconfig
parentbdf20507da11a9a5b32ef04fa09f352828189aef (diff)
parentce8f0d0607bcad3ec0e8599be80353204427093e (diff)
Merge branch 'mips-next' of http://dev.phrozen.org/githttp/mips-next into mips-for-linux-next
Diffstat (limited to 'arch/mips/Kconfig')
-rw-r--r--arch/mips/Kconfig11
1 files changed, 6 insertions, 5 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 9806a5ae50b..b7dc39c6c84 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -106,6 +106,7 @@ config ATH79
config BCM47XX
bool "Broadcom BCM47XX based boards"
+ select ARCH_WANT_OPTIONAL_GPIOLIB
select CEVT_R4K
select CSRC_R4K
select DMA_NONCOHERENT
@@ -114,7 +115,6 @@ config BCM47XX
select IRQ_CPU
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_LITTLE_ENDIAN
- select GENERIC_GPIO
select SYS_HAS_EARLY_PRINTK
help
Support for BCM47XX based boards
@@ -798,7 +798,7 @@ config NLM_XLR_BOARD
select CSRC_R4K
select IRQ_CPU
select ARCH_SUPPORTS_MSI
- select ZONE_DMA if 64BIT
+ select ZONE_DMA32 if 64BIT
select SYNC_R4K
select SYS_HAS_EARLY_PRINTK
select USB_ARCH_HAS_OHCI if USB_SUPPORT
@@ -826,7 +826,7 @@ config NLM_XLP_BOARD
select CEVT_R4K
select CSRC_R4K
select IRQ_CPU
- select ZONE_DMA if 64BIT
+ select ZONE_DMA32 if 64BIT
select SYNC_R4K
select SYS_HAS_EARLY_PRINTK
select USE_OF
@@ -1507,6 +1507,7 @@ config CPU_XLP
select WEAK_ORDERING
select WEAK_REORDERING_BEYOND_LLSC
select CPU_HAS_PREFETCH
+ select CPU_MIPSR2
help
Netlogic Microsystems XLP processors.
endchoice
@@ -1718,7 +1719,7 @@ config CPU_SUPPORTS_UNCACHED_ACCELERATED
bool
config MIPS_PGD_C0_CONTEXT
bool
- default y if 64BIT && CPU_MIPSR2
+ default y if 64BIT && CPU_MIPSR2 && !CPU_XLP
#
# Set to y for ptrace access to watch registers.
@@ -2149,7 +2150,7 @@ config NODES_SHIFT
config HW_PERF_EVENTS
bool "Enable hardware performance counter support for perf events"
- depends on PERF_EVENTS && !MIPS_MT_SMTC && OPROFILE=n && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON)
+ depends on PERF_EVENTS && !MIPS_MT_SMTC && OPROFILE=n && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP)
default y
help
Enable hardware performance counter support for perf events. If