Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/upstream-linus

* 'upstream' of git://git.linux-mips.org/pub/scm/upstream-linus:
  MIPS: Octeon: Place cnmips_cu2_setup in __init memory.
  MIPS: Don't place cu2 notifiers in __cpuinitdata
  MIPS: Calculate VMLINUZ_LOAD_ADDRESS based on the length of vmlinux.bin
  MIPS: Alchemy: Resolve prom section mismatches
  MIPS: Fix syscall 64 bit number comments.
  MIPS: Hookup fanotify_init, fanotify_mark, and prlimit64 syscalls.
  MIPS: TX49xx: Rename ARCH_KMALLOC_MINALIGN to ARCH_DMA_MINALIGN
  MIPS: N32: Fix getdents64 syscall for n32
  MIPS: Remove pr_<level> uses of KERN_<level>
  MIPS: PNX8550: Sort out machine halt, restart and powerdown functions.
  MIPS: GIC: Remove dependencies from Malta files.
  MIPS: Kconfig: Fix and clarify kconfig help text for VSMP and SMTC.
  MIPS: DMA: Fix computation of DMA flags from device's coherent_dma_mask.
  MIPS: Audit: Fix hang in entry.S.
  MIPS: Document why RELOC_HIDE is there.
  MIPS: Octeon: Determine if helper needs to be built
  MIPS: Use generic atomic64 for 32-bit kernels
  MIPS: RM7000: Symbol should be static
  MIPS: kspd: Adjust confusing if indentation
  MIPS: Fix a typo.

1 files changed, 19 insertions, 2 deletions

diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 3ad59dde485..5526faabfc2 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -13,6 +13,7 @@ config MIPS
 	select HAVE_KPROBES
 	select HAVE_KRETPROBES
 	select RTC_LIB if !MACH_LOONGSON
+	select GENERIC_ATOMIC64 if !64BIT
 
 mainmenu "Linux/MIPS Kernel Configuration"
 
@@ -1646,8 +1647,16 @@ config MIPS_MT_SMP
 	select SYS_SUPPORTS_SMP
 	select SMP_UP
 	help
-	  This is a kernel model which is also known a VSMP or lately
-	  has been marketesed into SMVP.
+	  This is a kernel model which is known a VSMP but lately has been
+	  marketesed into SMVP.
+	  Virtual SMP uses the processor's VPEs  to implement virtual
+	  processors. In currently available configuration of the 34K processor
+	  this allows for a dual processor. Both processors will share the same
+	  primary caches; each will obtain the half of the TLB for it's own
+	  exclusive use. For a layman this model can be described as similar to
+	  what Intel calls Hyperthreading.
+
+	  For further information see http://www.linux-mips.org/wiki/34K#VSMP
 
 config MIPS_MT_SMTC
 	bool "SMTC: Use all TCs on all VPEs for SMP"
@@ -1664,6 +1673,14 @@ config MIPS_MT_SMTC
 	help
 	  This is a kernel model which is known a SMTC or lately has been
 	  marketesed into SMVP.
+	  is presenting the available TC's of the core as processors to Linux.
+	  On currently available 34K processors this means a Linux system will
+	  see up to 5 processors. The implementation of the SMTC kernel differs
+	  significantly from VSMP and cannot efficiently coexist in the same
+	  kernel binary so the choice between VSMP and SMTC is a compile time
+	  decision.
+
+	  For further information see http://www.linux-mips.org/wiki/34K#SMTC
 
 endchoice