diff options
author | Manuel Lauss <mano@roarinelk.homelinux.net> | 2008-12-21 09:26:27 +0100 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2009-01-11 09:57:27 +0000 |
commit | 61f9c58da57a80b0df1ced18a28cbbaebd4d417a (patch) | |
tree | cbeaa2353d98899e88c6d44dc8d1a16eabbb6a47 /arch/mips/alchemy/common/irq.c | |
parent | ac15dad061d351281b0bafbae1ecdd84e601435a (diff) |
MIPS: Alchemy: new userspace suspend interface for development boards.
Replace the current sysctl-based suspend interface with a new sysfs-
based one which also uses the Linux-2.6 suspend model.
To configure wakeup sources, a subtree for the demoboards is created
under /sys/power/db1x:
sys/
`-- power
`-- db1x
|-- gpio0
|-- gpio1
|-- gpio2
|-- gpio3
|-- gpio4
|-- gpio5
|-- gpio6
|-- gpio7
|-- timer
|-- timer_timeout
|-- wakemsk
`-- wakesrc
The nodes 'gpio[0-7]' and 'timer' configure the GPIO0..7 and M2
bits of the SYS_WAKEMSK (wakeup source enable) register. Writing '1'
enables a wakesource, 0 disables it.
The 'timer_timeout' node holds the timeout in seconds after which the
TOYMATCH2 event should wake the system.
The 'wakesrc' node holds the SYS_WAKESRC register after wakeup (in hex),
the 'wakemsk' node can be used to get/set the wakeup mask directly.
For example, to have the timer wake the system after 10 seconds of sleep,
the following must be done in userspace:
echo 10 > /sys/power/db1x/timer_timeout
echo 1 > /sys/power/db1x/timer
echo mem > /sys/power/sleep
This patch also removes the homebrew CPU frequency switching code. I don't
understand how it could have ever worked reliably; it does not communicate
the clock changes to peripheral devices other than uarts.
Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
create mode 100644 arch/mips/alchemy/devboards/pm.c
Diffstat (limited to 'arch/mips/alchemy/common/irq.c')
-rw-r--r-- | arch/mips/alchemy/common/irq.c | 44 |
1 files changed, 0 insertions, 44 deletions
diff --git a/arch/mips/alchemy/common/irq.c b/arch/mips/alchemy/common/irq.c index c54384779fb..c88c821b4c3 100644 --- a/arch/mips/alchemy/common/irq.c +++ b/arch/mips/alchemy/common/irq.c @@ -37,8 +37,6 @@ #include <asm/mach-pb1x00/pb1000.h> #endif -static DEFINE_SPINLOCK(irq_lock); - static int au1x_ic_settype(unsigned int irq, unsigned int flow_type); /* per-processor fixed function irqs */ @@ -611,45 +609,3 @@ void __init arch_init_irq(void) set_c0_status(IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3); } - -unsigned long save_local_and_disable(int controller) -{ - int i; - unsigned long flags, mask; - - spin_lock_irqsave(&irq_lock, flags); - if (controller) { - mask = au_readl(IC1_MASKSET); - for (i = 0; i < 32; i++) - au1x_ic1_mask(i + AU1000_INTC1_INT_BASE); - } else { - mask = au_readl(IC0_MASKSET); - for (i = 0; i < 32; i++) - au1x_ic0_mask(i + AU1000_INTC0_INT_BASE); - } - spin_unlock_irqrestore(&irq_lock, flags); - - return mask; -} - -void restore_local_and_enable(int controller, unsigned long mask) -{ - int i; - unsigned long flags, new_mask; - - spin_lock_irqsave(&irq_lock, flags); - for (i = 0; i < 32; i++) - if (mask & (1 << i)) { - if (controller) - au1x_ic1_unmask(i + AU1000_INTC1_INT_BASE); - else - au1x_ic0_unmask(i + AU1000_INTC0_INT_BASE); - } - - if (controller) - new_mask = au_readl(IC1_MASKSET); - else - new_mask = au_readl(IC0_MASKSET); - - spin_unlock_irqrestore(&irq_lock, flags); -} |