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authorManuel Lauss <manuel.lauss@googlemail.com>2010-07-15 21:45:04 +0200
committerRalf Baechle <ralf@linux-mips.org>2010-08-05 13:26:06 +0100
commit42a4f17dc356689075263d7c2bd68456676fa62e (patch)
tree2c66f5be57722cff7bb39eb0b59c3ec6eb24fff6 /arch/mips/alchemy
parent745aef5df1e2277ee9e34d86491084c0d6106338 (diff)
MIPS: Alchemy: remove SOC_AU1X00 in favor of MIPS_ALCHEMY
Remove the CONFIG_SOC_AU1X00 Kconfig symbol since its job can also be done by MACH_ALCHEMY, now renamed to MIPS_ALCHEMY. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/1461/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/alchemy')
-rw-r--r--arch/mips/alchemy/Kconfig19
-rw-r--r--arch/mips/alchemy/Platform4
2 files changed, 3 insertions, 20 deletions
diff --git a/arch/mips/alchemy/Kconfig b/arch/mips/alchemy/Kconfig
index df3b1a7eb15..1179c4d4cf1 100644
--- a/arch/mips/alchemy/Kconfig
+++ b/arch/mips/alchemy/Kconfig
@@ -11,7 +11,7 @@ config ALCHEMY_GPIO_INDIRECT
choice
prompt "Machine type"
- depends on MACH_ALCHEMY
+ depends on MIPS_ALCHEMY
default MIPS_DB1000
config MIPS_MTX1
@@ -132,37 +132,20 @@ endchoice
config SOC_AU1000
bool
- select SOC_AU1X00
select ALCHEMY_GPIOINT_AU1000
config SOC_AU1100
bool
- select SOC_AU1X00
select ALCHEMY_GPIOINT_AU1000
config SOC_AU1500
bool
- select SOC_AU1X00
select ALCHEMY_GPIOINT_AU1000
config SOC_AU1550
bool
- select SOC_AU1X00
select ALCHEMY_GPIOINT_AU1000
config SOC_AU1200
bool
- select SOC_AU1X00
select ALCHEMY_GPIOINT_AU1000
-
-config SOC_AU1X00
- bool
- select 64BIT_PHYS_ADDR
- select CEVT_R4K_LIB
- select CSRC_R4K_LIB
- select IRQ_CPU
- select SYS_HAS_CPU_MIPS32_R1
- select SYS_SUPPORTS_32BIT_KERNEL
- select SYS_SUPPORTS_APM_EMULATION
- select GENERIC_GPIO
- select ARCH_WANT_OPTIONAL_GPIOLIB
diff --git a/arch/mips/alchemy/Platform b/arch/mips/alchemy/Platform
index 495cc9a2a3b..0bf2b09f310 100644
--- a/arch/mips/alchemy/Platform
+++ b/arch/mips/alchemy/Platform
@@ -1,7 +1,7 @@
#
# Core Alchemy code
#
-platform-$(CONFIG_MACH_ALCHEMY) += alchemy/common/
+platform-$(CONFIG_MIPS_ALCHEMY) += alchemy/common/
#
@@ -106,4 +106,4 @@ load-$(CONFIG_MIPS_XXS1500) += 0xffffffff80100000
# compiler picks the board one. If they don't, it will make sure
# the alchemy generic gpio header is picked up.
-cflags-$(CONFIG_MACH_ALCHEMY) += -I$(srctree)/arch/mips/include/asm/mach-au1x00
+cflags-$(CONFIG_MIPS_ALCHEMY) += -I$(srctree)/arch/mips/include/asm/mach-au1x00