diff options
| author | Ingo Molnar <mingo@elte.hu> | 2009-11-17 10:16:43 +0100 |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2009-11-17 10:17:47 +0100 |
| commit | a7b63425a41cd6a8d50f76fef0660c5110f97e91 (patch) | |
| tree | be17ee121f1c8814d8d39c9f3e0205d9397fab54 /arch/mips/alchemy | |
| parent | 35039eb6b199749943547c8572be6604edf00229 (diff) | |
| parent | 3726cc75e581c157202da93bb2333cce25c15c98 (diff) | |
Merge branch 'perf/core' into perf/probes
Resolved merge conflict in tools/perf/Makefile
Merge reason: we want to queue up a dependent patch.
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/mips/alchemy')
| -rw-r--r-- | arch/mips/alchemy/common/irq.c | 34 | ||||
| -rw-r--r-- | arch/mips/alchemy/mtx-1/board_setup.c | 3 |
2 files changed, 27 insertions, 10 deletions
diff --git a/arch/mips/alchemy/common/irq.c b/arch/mips/alchemy/common/irq.c index c88c821b4c3..d670928afcf 100644 --- a/arch/mips/alchemy/common/irq.c +++ b/arch/mips/alchemy/common/irq.c @@ -354,6 +354,28 @@ static void au1x_ic1_ack(unsigned int irq_nr) au_sync(); } +static void au1x_ic0_maskack(unsigned int irq_nr) +{ + unsigned int bit = irq_nr - AU1000_INTC0_INT_BASE; + + au_writel(1 << bit, IC0_WAKECLR); + au_writel(1 << bit, IC0_MASKCLR); + au_writel(1 << bit, IC0_RISINGCLR); + au_writel(1 << bit, IC0_FALLINGCLR); + au_sync(); +} + +static void au1x_ic1_maskack(unsigned int irq_nr) +{ + unsigned int bit = irq_nr - AU1000_INTC1_INT_BASE; + + au_writel(1 << bit, IC1_WAKECLR); + au_writel(1 << bit, IC1_MASKCLR); + au_writel(1 << bit, IC1_RISINGCLR); + au_writel(1 << bit, IC1_FALLINGCLR); + au_sync(); +} + static int au1x_ic1_setwake(unsigned int irq, unsigned int on) { unsigned int bit = irq - AU1000_INTC1_INT_BASE; @@ -379,25 +401,21 @@ static int au1x_ic1_setwake(unsigned int irq, unsigned int on) /* * irq_chips for both ICs; this way the mask handlers can be * as short as possible. - * - * NOTE: the ->ack() callback is used by the handle_edge_irq - * flowhandler only, the ->mask_ack() one by handle_level_irq, - * so no need for an irq_chip for each type of irq (level/edge). */ static struct irq_chip au1x_ic0_chip = { .name = "Alchemy-IC0", - .ack = au1x_ic0_ack, /* edge */ + .ack = au1x_ic0_ack, .mask = au1x_ic0_mask, - .mask_ack = au1x_ic0_mask, /* level */ + .mask_ack = au1x_ic0_maskack, .unmask = au1x_ic0_unmask, .set_type = au1x_ic_settype, }; static struct irq_chip au1x_ic1_chip = { .name = "Alchemy-IC1", - .ack = au1x_ic1_ack, /* edge */ + .ack = au1x_ic1_ack, .mask = au1x_ic1_mask, - .mask_ack = au1x_ic1_mask, /* level */ + .mask_ack = au1x_ic1_maskack, .unmask = au1x_ic1_unmask, .set_type = au1x_ic_settype, .set_wake = au1x_ic1_setwake, diff --git a/arch/mips/alchemy/mtx-1/board_setup.c b/arch/mips/alchemy/mtx-1/board_setup.c index cc32c69a74a..45b61c9b82b 100644 --- a/arch/mips/alchemy/mtx-1/board_setup.c +++ b/arch/mips/alchemy/mtx-1/board_setup.c @@ -69,6 +69,7 @@ void __init board_setup(void) #else au_writel(0xf, Au1500_PCI_CFG); #endif + board_pci_idsel = mtx1_pci_idsel; #endif /* Initialize sys_pinfunc */ @@ -85,8 +86,6 @@ void __init board_setup(void) alchemy_gpio_direction_output(211, 1); /* green on */ alchemy_gpio_direction_output(212, 0); /* red off */ - board_pci_idsel = mtx1_pci_idsel; - printk(KERN_INFO "4G Systems MTX-1 Board\n"); } |