Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/upstream-linus

* 'upstream' of git://git.linux-mips.org/pub/scm/upstream-linus: (28 commits)
  MIPS: Add a CONFIG_FORCE_MAX_ZONEORDER Kconfig option.
  MIPS: LD/SD o32 macro GAS fix update
  MIPS: Alchemy: fix build with SERIAL_8250=n
  MIPS: Rename mips_dma_cache_sync back to dma_cache_sync
  MIPS: MT: Fix typo in comment.
  SSB: Fix nvram_get on BCM47xx platform
  MIPS: BCM47xx: Swap serial console if ttyS1 was specified.
  MIPS: BCM47xx: Use sscanf for parsing mac address
  MIPS: BCM47xx: Fill values for b43 into SSB sprom
  MIPS: BCM47xx: Do not read config from CFE
  MIPS: FDT size is a be32
  MIPS: Fix CP0 COUNTER clockevent race
  MIPS: Fix regression on BCM4710 processor detection
  MIPS: JZ4740: Fix pcm device name
  MIPS: Separate two consecutive loads in memset.S
  MIPS: Send proper signal and siginfo on FP emulator faults.
  MIPS: AR7: Fix loops per jiffies on TNETD7200 devices
  MIPS: AR7: Fix double ar7_gpio_init declaration
  MIPS: Rework GENERIC_HARDIRQS Kconfig.
  MIPS: Alchemy: Add return value check for strict_strtoul()
  ...

2 files changed, 6 insertions, 6 deletions

diff --git a/arch/mips/ar7/clock.c b/arch/mips/ar7/clock.c
index fc0e7154e8d..2ca4ada1c29 100644
--- a/arch/mips/ar7/clock.c
+++ b/arch/mips/ar7/clock.c
@@ -239,12 +239,12 @@ static void tnetd7300_set_clock(u32 shift, struct tnetd7300_clock *clock,
 	calculate(base_clock, frequency, &prediv, &postdiv, &mul);
 
 	writel(((prediv - 1) << PREDIV_SHIFT) | (postdiv - 1), &clock->ctrl);
-	msleep(1);
+	mdelay(1);
 	writel(4, &clock->pll);
 	while (readl(&clock->pll) & PLL_STATUS)
 		;
 	writel(((mul - 1) << MUL_SHIFT) | (0xff << 3) | 0x0e, &clock->pll);
-	msleep(75);
+	mdelay(75);
 }
 
 static void __init tnetd7300_init_clocks(void)
@@ -456,7 +456,7 @@ void clk_put(struct clk *clk)
 }
 EXPORT_SYMBOL(clk_put);
 
-int __init ar7_init_clocks(void)
+void __init ar7_init_clocks(void)
 {
 	switch (ar7_chip_id()) {
 	case AR7_CHIP_7100:
@@ -472,7 +472,4 @@ int __init ar7_init_clocks(void)
 	}
 	/* adjust vbus clock rate */
 	vbus_clk.rate = bus_clk.rate / 2;
-
-	return 0;
 }
-arch_initcall(ar7_init_clocks);
diff --git a/arch/mips/ar7/time.c b/arch/mips/ar7/time.c
index 5fb8a013408..22c93213b23 100644
--- a/arch/mips/ar7/time.c
+++ b/arch/mips/ar7/time.c
@@ -30,6 +30,9 @@ void __init plat_time_init(void)
 {
 	struct clk *cpu_clk;
 
+	/* Initialize ar7 clocks so the CPU clock frequency is correct */
+	ar7_init_clocks();
+
 	cpu_clk = clk_get(NULL, "cpu");
 	if (IS_ERR(cpu_clk)) {
 		printk(KERN_ERR "unable to get cpu clock\n");