diff options
author | Linus Torvalds <torvalds@woody.osdl.org> | 2006-12-01 16:44:02 -0800 |
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committer | Linus Torvalds <torvalds@woody.osdl.org> | 2006-12-01 16:44:02 -0800 |
commit | c3e59d1e891f6140a346de2b8547e25133c716b0 (patch) | |
tree | b2a669f625009a3a33f20f648bd654637323d296 /arch/mips/au1000/common/irq.c | |
parent | b07e3c3a1db0ce399d2a1d04860e1b901927c05e (diff) | |
parent | aa414dff4f7bef29457592414551becdca72dd6b (diff) |
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (31 commits)
[MIPS] Remove duplicate ISA DMA code for 0 DMA channel case.
[MIPS] Remove unused definition of cpu_to_lelongp()
[MIPS] Remove userspace proofing from <asm/bitops.h>.
[MIPS] Remove old junk left from old atomic_lock.
[MIPS] Use conditional traps for BUG_ON on MIPS II and better.
[MIPS] mips HPT cleanup: make clocksource_mips public
[MIPS] do_IRQ cleanup
[MIPS] Avoid dupliate D-cache flush on R400C / R4400 SC and MC variants.
[MIPS] Remove redundant r4k_blast_icache() calls
[MIPS] Work around bogus gcc warnings.
[MIPS] Fix double inclusions
[MIPS] use generic_handle_irq, handle_level_irq, handle_percpu_irq
[MIPS] IRQ cleanups
[MIPS] mips hpt cleanup: get rid of mips_hpt_init
[MIPS] PB1200: Remove duplicate definitions
[MIPS] Fix alignment hole in struct cache_desc; shrink struct.
[MIPS] Oprofile: kernel support for the R10000.
[MIPS] Remove unused R10000 performance counter definitions.
[MIPS] Add support for kexec
[MIPS] Don't print presence of WAIT instruction on bootup.
...
Diffstat (limited to 'arch/mips/au1000/common/irq.c')
-rw-r--r-- | arch/mips/au1000/common/irq.c | 63 |
1 files changed, 22 insertions, 41 deletions
diff --git a/arch/mips/au1000/common/irq.c b/arch/mips/au1000/common/irq.c index 2abe132bb07..9cf7b671583 100644 --- a/arch/mips/au1000/common/irq.c +++ b/arch/mips/au1000/common/irq.c @@ -70,7 +70,6 @@ extern irq_cpustat_t irq_stat [NR_CPUS]; extern void mips_timer_interrupt(void); static void setup_local_irq(unsigned int irq, int type, int int_req); -static unsigned int startup_irq(unsigned int irq); static void end_irq(unsigned int irq_nr); static inline void mask_and_ack_level_irq(unsigned int irq_nr); static inline void mask_and_ack_rise_edge_irq(unsigned int irq_nr); @@ -84,20 +83,6 @@ void (*board_init_irq)(void); static DEFINE_SPINLOCK(irq_lock); -static unsigned int startup_irq(unsigned int irq_nr) -{ - local_enable_irq(irq_nr); - return 0; -} - - -static void shutdown_irq(unsigned int irq_nr) -{ - local_disable_irq(irq_nr); - return; -} - - inline void local_enable_irq(unsigned int irq_nr) { if (irq_nr > AU1000_LAST_INTC0_INT) { @@ -249,41 +234,37 @@ void restore_local_and_enable(int controller, unsigned long mask) static struct irq_chip rise_edge_irq_type = { .typename = "Au1000 Rise Edge", - .startup = startup_irq, - .shutdown = shutdown_irq, - .enable = local_enable_irq, - .disable = local_disable_irq, .ack = mask_and_ack_rise_edge_irq, + .mask = local_disable_irq, + .mask_ack = mask_and_ack_rise_edge_irq, + .unmask = local_enable_irq, .end = end_irq, }; static struct irq_chip fall_edge_irq_type = { .typename = "Au1000 Fall Edge", - .startup = startup_irq, - .shutdown = shutdown_irq, - .enable = local_enable_irq, - .disable = local_disable_irq, .ack = mask_and_ack_fall_edge_irq, + .mask = local_disable_irq, + .mask_ack = mask_and_ack_fall_edge_irq, + .unmask = local_enable_irq, .end = end_irq, }; static struct irq_chip either_edge_irq_type = { .typename = "Au1000 Rise or Fall Edge", - .startup = startup_irq, - .shutdown = shutdown_irq, - .enable = local_enable_irq, - .disable = local_disable_irq, .ack = mask_and_ack_either_edge_irq, + .mask = local_disable_irq, + .mask_ack = mask_and_ack_either_edge_irq, + .unmask = local_enable_irq, .end = end_irq, }; static struct irq_chip level_irq_type = { .typename = "Au1000 Level", - .startup = startup_irq, - .shutdown = shutdown_irq, - .enable = local_enable_irq, - .disable = local_disable_irq, .ack = mask_and_ack_level_irq, + .mask = local_disable_irq, + .mask_ack = mask_and_ack_level_irq, + .unmask = local_enable_irq, .end = end_irq, }; @@ -328,31 +309,31 @@ static void setup_local_irq(unsigned int irq_nr, int type, int int_req) au_writel(1<<(irq_nr-32), IC1_CFG2CLR); au_writel(1<<(irq_nr-32), IC1_CFG1CLR); au_writel(1<<(irq_nr-32), IC1_CFG0SET); - irq_desc[irq_nr].chip = &rise_edge_irq_type; + set_irq_chip(irq_nr, &rise_edge_irq_type); break; case INTC_INT_FALL_EDGE: /* 0:1:0 */ au_writel(1<<(irq_nr-32), IC1_CFG2CLR); au_writel(1<<(irq_nr-32), IC1_CFG1SET); au_writel(1<<(irq_nr-32), IC1_CFG0CLR); - irq_desc[irq_nr].chip = &fall_edge_irq_type; + set_irq_chip(irq_nr, &fall_edge_irq_type); break; case INTC_INT_RISE_AND_FALL_EDGE: /* 0:1:1 */ au_writel(1<<(irq_nr-32), IC1_CFG2CLR); au_writel(1<<(irq_nr-32), IC1_CFG1SET); au_writel(1<<(irq_nr-32), IC1_CFG0SET); - irq_desc[irq_nr].chip = &either_edge_irq_type; + set_irq_chip(irq_nr, &either_edge_irq_type); break; case INTC_INT_HIGH_LEVEL: /* 1:0:1 */ au_writel(1<<(irq_nr-32), IC1_CFG2SET); au_writel(1<<(irq_nr-32), IC1_CFG1CLR); au_writel(1<<(irq_nr-32), IC1_CFG0SET); - irq_desc[irq_nr].chip = &level_irq_type; + set_irq_chip(irq_nr, &level_irq_type); break; case INTC_INT_LOW_LEVEL: /* 1:1:0 */ au_writel(1<<(irq_nr-32), IC1_CFG2SET); au_writel(1<<(irq_nr-32), IC1_CFG1SET); au_writel(1<<(irq_nr-32), IC1_CFG0CLR); - irq_desc[irq_nr].chip = &level_irq_type; + set_irq_chip(irq_nr, &level_irq_type); break; case INTC_INT_DISABLED: /* 0:0:0 */ au_writel(1<<(irq_nr-32), IC1_CFG0CLR); @@ -380,31 +361,31 @@ static void setup_local_irq(unsigned int irq_nr, int type, int int_req) au_writel(1<<irq_nr, IC0_CFG2CLR); au_writel(1<<irq_nr, IC0_CFG1CLR); au_writel(1<<irq_nr, IC0_CFG0SET); - irq_desc[irq_nr].chip = &rise_edge_irq_type; + set_irq_chip(irq_nr, &rise_edge_irq_type); break; case INTC_INT_FALL_EDGE: /* 0:1:0 */ au_writel(1<<irq_nr, IC0_CFG2CLR); au_writel(1<<irq_nr, IC0_CFG1SET); au_writel(1<<irq_nr, IC0_CFG0CLR); - irq_desc[irq_nr].chip = &fall_edge_irq_type; + set_irq_chip(irq_nr, &fall_edge_irq_type); break; case INTC_INT_RISE_AND_FALL_EDGE: /* 0:1:1 */ au_writel(1<<irq_nr, IC0_CFG2CLR); au_writel(1<<irq_nr, IC0_CFG1SET); au_writel(1<<irq_nr, IC0_CFG0SET); - irq_desc[irq_nr].chip = &either_edge_irq_type; + set_irq_chip(irq_nr, &either_edge_irq_type); break; case INTC_INT_HIGH_LEVEL: /* 1:0:1 */ au_writel(1<<irq_nr, IC0_CFG2SET); au_writel(1<<irq_nr, IC0_CFG1CLR); au_writel(1<<irq_nr, IC0_CFG0SET); - irq_desc[irq_nr].chip = &level_irq_type; + set_irq_chip(irq_nr, &level_irq_type); break; case INTC_INT_LOW_LEVEL: /* 1:1:0 */ au_writel(1<<irq_nr, IC0_CFG2SET); au_writel(1<<irq_nr, IC0_CFG1SET); au_writel(1<<irq_nr, IC0_CFG0CLR); - irq_desc[irq_nr].chip = &level_irq_type; + set_irq_chip(irq_nr, &level_irq_type); break; case INTC_INT_DISABLED: /* 0:0:0 */ au_writel(1<<irq_nr, IC0_CFG0CLR); |