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authorSergei Shtylyov <sshtylyov@ru.mvista.com>2008-04-30 23:18:41 +0400
committerRalf Baechle <ralf@linux-mips.org>2008-05-12 16:46:52 +0100
commitc1dcb14ec2ae3c594ce1c2db953004083f2bd4a0 (patch)
tree1724db98ba009b3b8af1750af09f2992bc106eeb /arch/mips/au1000/common/time.c
parentff6814d53016081947ff4021e00db3f806a561c9 (diff)
[MIPS] Alchemy common code style cleanup
Fix many errors and warnings given by checkpatch.pl: - use of C99 // comments; - missing space between the type and asterisk in a variable declaration; - space between the asterisk and function/variable name; - leading spaces instead of tabs; - space after opening and before closing parentheses; - initialization of a 'static' variable to 0; - missing spaces around assignement/comparison operator; - brace not on the same line with condition (or 'else') in the 'if'/'switch' statement; - missing space between 'if'/'for'/'while' and opening parenthesis; - use of assignement in 'if' statement's condition; - printk() without KERN_* facility level; - EXPORT_SYMBOL() not following its function immediately; - unnecessary braces for single-statement block; - adding new 'typedef' (where including <linux/types.h> will do); - use of 'extern' in the .c file (where it can be avoided by including header); - line over 80 characters. In addition to these changes, also do the following: - insert missing space after opening brace and/or before closing brace in the structure initializers; - insert spaces between operator and its operands; - put the function's result type and name/parameters on the same line; - properly indent multi-line expressions; - remove commented out code; - remove useless initializers and code; - remove needless parentheses; - fix broken/excess indentation; - add missing spaces between operator and its operands; - insert missing and remove excess new lines; - group 'else' and 'if' together where possible; - make au1xxx_platform_init() 'static'; - regroup variable declarations in pm_do_freq() for prettier look; - replace numeric literals with the matching macros; - fix printk() format specifiers mismatching the argument types; - make the multi-line comment style consistent with the kernel style elsewhere by adding empty first line and/or adding space on their left side; - make two-line comments that only have one line of text one-line; - fix typos/errors, capitalize acronyms, etc. in the comments; - fix/remove obsolete references in the comments; - reformat some comments; - add comment about the CPU:counter clock ratio to calc_clock(); - update MontaVista copyright; - remove Pete Popov's and Steve Longerbeam's old email addresses... Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/au1000/common/time.c')
-rw-r--r--arch/mips/au1000/common/time.c78
1 files changed, 35 insertions, 43 deletions
diff --git a/arch/mips/au1000/common/time.c b/arch/mips/au1000/common/time.c
index bdb6d73b26f..563d9390a87 100644
--- a/arch/mips/au1000/common/time.c
+++ b/arch/mips/au1000/common/time.c
@@ -25,11 +25,9 @@
*
* Setting up the clock on the MIPS boards.
*
- * Update. Always configure the kernel with CONFIG_NEW_TIME_C. This
- * will use the user interface gettimeofday() functions from the
- * arch/mips/kernel/time.c, and we provide the clock interrupt processing
- * and the timer offset compute functions. If CONFIG_PM is selected,
- * we also ensure the 32KHz timer is available. -- Dan
+ * We provide the clock interrupt processing and the timer offset compute
+ * functions. If CONFIG_PM is selected, we also ensure the 32KHz timer is
+ * available. -- Dan
*/
#include <linux/types.h>
@@ -47,8 +45,7 @@ extern int allow_au1k_wait; /* default off for CP0 Counter */
#if HZ < 100 || HZ > 1000
#error "unsupported HZ value! Must be in [100,1000]"
#endif
-#define MATCH20_INC (328*100/HZ) /* magic number 328 is for HZ=100... */
-extern void startup_match20_interrupt(irq_handler_t handler);
+#define MATCH20_INC (328 * 100 / HZ) /* magic number 328 is for HZ=100... */
static unsigned long last_pc0, last_match20;
#endif
@@ -61,7 +58,7 @@ static irqreturn_t counter0_irq(int irq, void *dev_id)
{
unsigned long pc0;
int time_elapsed;
- static int jiffie_drift = 0;
+ static int jiffie_drift;
if (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_M20) {
/* should never happen! */
@@ -70,13 +67,11 @@ static irqreturn_t counter0_irq(int irq, void *dev_id)
}
pc0 = au_readl(SYS_TOYREAD);
- if (pc0 < last_match20) {
+ if (pc0 < last_match20)
/* counter overflowed */
time_elapsed = (0xffffffff - last_match20) + pc0;
- }
- else {
+ else
time_elapsed = pc0 - last_match20;
- }
while (time_elapsed > 0) {
do_timer(1);
@@ -92,8 +87,9 @@ static irqreturn_t counter0_irq(int irq, void *dev_id)
au_writel(last_match20 + MATCH20_INC, SYS_TOYMATCH2);
au_sync();
- /* our counter ticks at 10.009765625 ms/tick, we we're running
- * almost 10uS too slow per tick.
+ /*
+ * Our counter ticks at 10.009765625 ms/tick, we we're running
+ * almost 10 uS too slow per tick.
*/
if (jiffie_drift >= 999) {
@@ -117,20 +113,17 @@ struct irqaction counter0_action = {
/* When we wakeup from sleep, we have to "catch up" on all of the
* timer ticks we have missed.
*/
-void
-wakeup_counter0_adjust(void)
+void wakeup_counter0_adjust(void)
{
unsigned long pc0;
int time_elapsed;
pc0 = au_readl(SYS_TOYREAD);
- if (pc0 < last_match20) {
+ if (pc0 < last_match20)
/* counter overflowed */
time_elapsed = (0xffffffff - last_match20) + pc0;
- }
- else {
+ else
time_elapsed = pc0 - last_match20;
- }
while (time_elapsed > 0) {
time_elapsed -= MATCH20_INC;
@@ -143,10 +136,8 @@ wakeup_counter0_adjust(void)
}
-/* This is just for debugging to set the timer for a sleep delay.
-*/
-void
-wakeup_counter0_set(int ticks)
+/* This is just for debugging to set the timer for a sleep delay. */
+void wakeup_counter0_set(int ticks)
{
unsigned long pc0;
@@ -157,21 +148,22 @@ wakeup_counter0_set(int ticks)
}
#endif
-/* I haven't found anyone that doesn't use a 12 MHz source clock,
+/*
+ * I haven't found anyone that doesn't use a 12 MHz source clock,
* but just in case.....
*/
#define AU1000_SRC_CLK 12000000
/*
* We read the real processor speed from the PLL. This is important
- * because it is more accurate than computing it from the 32KHz
+ * because it is more accurate than computing it from the 32 KHz
* counter, if it exists. If we don't have an accurate processor
* speed, all of the peripherals that derive their clocks based on
* this advertised speed will introduce error and sometimes not work
* properly. This function is futher convoluted to still allow configurations
* to do that in case they have really, really old silicon with a
- * write-only PLL register, that we need the 32KHz when power management
- * "wait" is enabled, and we need to detect if the 32KHz isn't present
+ * write-only PLL register, that we need the 32 KHz when power management
+ * "wait" is enabled, and we need to detect if the 32 KHz isn't present
* but requested......got it? :-) -- Dan
*/
unsigned long calc_clock(void)
@@ -182,8 +174,7 @@ unsigned long calc_clock(void)
spin_lock_irqsave(&time_lock, flags);
- /* Power management cares if we don't have a 32KHz counter.
- */
+ /* Power management cares if we don't have a 32 KHz counter. */
no_au1xxx_32khz = 0;
counter = au_readl(SYS_COUNTER_CNTRL);
if (counter & SYS_CNTRL_E0) {
@@ -193,7 +184,7 @@ unsigned long calc_clock(void)
while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_T1S);
/* RTC now ticks at 32.768/16 kHz */
- au_writel(trim_divide-1, SYS_RTCTRIM);
+ au_writel(trim_divide - 1, SYS_RTCTRIM);
while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_T1S);
while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_C1S);
@@ -215,9 +206,11 @@ unsigned long calc_clock(void)
#endif
else
cpu_speed = (au_readl(SYS_CPUPLL) & 0x0000003f) * AU1000_SRC_CLK;
+ /* On Alchemy CPU:counter ratio is 1:1 */
mips_hpt_frequency = cpu_speed;
- // Equation: Baudrate = CPU / (SD * 2 * CLKDIV * 16)
- set_au1x00_uart_baud_base(cpu_speed / (2 * ((int)(au_readl(SYS_POWERCTRL)&0x03) + 2) * 16));
+ /* Equation: Baudrate = CPU / (SD * 2 * CLKDIV * 16) */
+ set_au1x00_uart_baud_base(cpu_speed / (2 * ((int)(au_readl(SYS_POWERCTRL)
+ & 0x03) + 2) * 16));
spin_unlock_irqrestore(&time_lock, flags);
return cpu_speed;
}
@@ -228,10 +221,10 @@ void __init plat_time_init(void)
est_freq += 5000; /* round */
est_freq -= est_freq%10000;
- printk("CPU frequency %d.%02d MHz\n", est_freq/1000000,
- (est_freq%1000000)*100/1000000);
- set_au1x00_speed(est_freq);
- set_au1x00_lcd_clock(); // program the LCD clock
+ printk(KERN_INFO "CPU frequency %u.%02u MHz\n",
+ est_freq / 1000000, ((est_freq % 1000000) * 100) / 1000000);
+ set_au1x00_speed(est_freq);
+ set_au1x00_lcd_clock(); /* program the LCD clock */
#ifdef CONFIG_PM
/*
@@ -243,30 +236,29 @@ void __init plat_time_init(void)
* counter 0 interrupt as a special irq and it doesn't show
* up under /proc/interrupts.
*
- * Check to ensure we really have a 32KHz oscillator before
+ * Check to ensure we really have a 32 KHz oscillator before
* we do this.
*/
if (no_au1xxx_32khz)
- printk("WARNING: no 32KHz clock found.\n");
+ printk(KERN_WARNING "WARNING: no 32KHz clock found.\n");
else {
while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_C0S);
au_writel(0, SYS_TOYWRITE);
while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_C0S);
- au_writel(au_readl(SYS_WAKEMSK) | (1<<8), SYS_WAKEMSK);
+ au_writel(au_readl(SYS_WAKEMSK) | (1 << 8), SYS_WAKEMSK);
au_writel(~0, SYS_WAKESRC);
au_sync();
while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_M20);
- /* setup match20 to interrupt once every HZ */
+ /* Setup match20 to interrupt once every HZ */
last_pc0 = last_match20 = au_readl(SYS_TOYREAD);
au_writel(last_match20 + MATCH20_INC, SYS_TOYMATCH2);
au_sync();
while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_M20);
setup_irq(AU1000_TOY_MATCH2_INT, &counter0_action);
- /* We can use the real 'wait' instruction.
- */
+ /* We can use the real 'wait' instruction. */
allow_au1k_wait = 1;
}