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authorKevin Cernekee <cernekee@gmail.com>2010-10-16 14:22:30 -0700
committerRalf Baechle <ralf@linux-mips.org>2010-10-29 19:08:50 +0100
commit602977b0d672687909b0cb0542ede134ed6ef858 (patch)
tree8f40b3cfbf2cc32a445a69a548837521fcdfd7d6 /arch/mips/bcm63xx
parent3a9ab99e0341558e451327fbbfc39b0d3cff7e9a (diff)
MIPS: Decouple BMIPS CPU support from bcm47xx/bcm63xx SoC code
BMIPS processor cores are used in 50+ different chipsets spread across 5+ product lines. In many cases the chipsets do not share the same peripheral register layouts, the same register blocks, the same interrupt controllers, the same memory maps, or much of anything else. But, across radically different SoCs that share nothing more than the same BMIPS CPU, a few things are still mostly constant: SMP operations Access to performance counters DMA cache coherency quirks Cache and memory bus configuration So, it makes sense to treat each BMIPS processor type as a generic "building block," rather than tying it to a specific SoC. This makes it easier to support a large number of BMIPS-based chipsets without unnecessary duplication of code, and provides the infrastructure needed to support BMIPS-proprietary features. Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Cc: mbizon@freebox.fr Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Tested-by: Florian Fainelli <ffainelli@freebox.fr> Patchwork: https://patchwork.linux-mips.org/patch/1706/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org
Diffstat (limited to 'arch/mips/bcm63xx')
-rw-r--r--arch/mips/bcm63xx/cpu.c30
1 files changed, 15 insertions, 15 deletions
diff --git a/arch/mips/bcm63xx/cpu.c b/arch/mips/bcm63xx/cpu.c
index cbb7caf86d7..7c7e4d4486c 100644
--- a/arch/mips/bcm63xx/cpu.c
+++ b/arch/mips/bcm63xx/cpu.c
@@ -10,7 +10,9 @@
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/cpu.h>
+#include <asm/cpu.h>
#include <asm/cpu-info.h>
+#include <asm/mipsregs.h>
#include <bcm63xx_cpu.h>
#include <bcm63xx_regs.h>
#include <bcm63xx_io.h>
@@ -296,26 +298,24 @@ void __init bcm63xx_cpu_init(void)
expected_cpu_id = 0;
switch (c->cputype) {
- /*
- * BCM6338 as the same PrId as BCM3302 see arch/mips/kernel/cpu-probe.c
- */
- case CPU_BCM3302:
- __cpu_name[cpu] = "Broadcom BCM6338";
- expected_cpu_id = BCM6338_CPU_ID;
- bcm63xx_regs_base = bcm96338_regs_base;
- bcm63xx_irqs = bcm96338_irqs;
+ case CPU_BMIPS3300:
+ if ((read_c0_prid() & 0xff00) == PRID_IMP_BMIPS3300_ALT) {
+ expected_cpu_id = BCM6348_CPU_ID;
+ bcm63xx_regs_base = bcm96348_regs_base;
+ bcm63xx_irqs = bcm96348_irqs;
+ } else {
+ __cpu_name[cpu] = "Broadcom BCM6338";
+ expected_cpu_id = BCM6338_CPU_ID;
+ bcm63xx_regs_base = bcm96338_regs_base;
+ bcm63xx_irqs = bcm96338_irqs;
+ }
break;
- case CPU_BCM6345:
+ case CPU_BMIPS32:
expected_cpu_id = BCM6345_CPU_ID;
bcm63xx_regs_base = bcm96345_regs_base;
bcm63xx_irqs = bcm96345_irqs;
break;
- case CPU_BCM6348:
- expected_cpu_id = BCM6348_CPU_ID;
- bcm63xx_regs_base = bcm96348_regs_base;
- bcm63xx_irqs = bcm96348_irqs;
- break;
- case CPU_BCM6358:
+ case CPU_BMIPS4350:
expected_cpu_id = BCM6358_CPU_ID;
bcm63xx_regs_base = bcm96358_regs_base;
bcm63xx_irqs = bcm96358_irqs;