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authorTakashi Iwai <tiwai@suse.de>2010-02-17 14:24:46 +0100
committerTakashi Iwai <tiwai@suse.de>2010-02-17 14:24:46 +0100
commit7fb3a069bc5d3577409c2ae89f89cd264ff85816 (patch)
tree7fe3ba3b95faeecb01e4feafb9288ef4b523c6b3 /arch/mips/cavium-octeon/csrc-octeon.c
parent291186e049d7f8178ad31d43c38a53889f25d79e (diff)
parent9d3415a8cc76ff65c6602a121ac318432c5cd7ba (diff)
Merge branch 'fix/misc' into topic/misc
Conflicts: sound/pci/hda/patch_realtek.c
Diffstat (limited to 'arch/mips/cavium-octeon/csrc-octeon.c')
-rw-r--r--arch/mips/cavium-octeon/csrc-octeon.c32
1 files changed, 32 insertions, 0 deletions
diff --git a/arch/mips/cavium-octeon/csrc-octeon.c b/arch/mips/cavium-octeon/csrc-octeon.c
index 96110f217dc..0bf4bbe04ae 100644
--- a/arch/mips/cavium-octeon/csrc-octeon.c
+++ b/arch/mips/cavium-octeon/csrc-octeon.c
@@ -50,6 +50,38 @@ static struct clocksource clocksource_mips = {
.flags = CLOCK_SOURCE_IS_CONTINUOUS,
};
+unsigned long long notrace sched_clock(void)
+{
+ /* 64-bit arithmatic can overflow, so use 128-bit. */
+#if (__GNUC__ < 4) || ((__GNUC__ == 4) && (__GNUC_MINOR__ <= 3))
+ u64 t1, t2, t3;
+ unsigned long long rv;
+ u64 mult = clocksource_mips.mult;
+ u64 shift = clocksource_mips.shift;
+ u64 cnt = read_c0_cvmcount();
+
+ asm (
+ "dmultu\t%[cnt],%[mult]\n\t"
+ "nor\t%[t1],$0,%[shift]\n\t"
+ "mfhi\t%[t2]\n\t"
+ "mflo\t%[t3]\n\t"
+ "dsll\t%[t2],%[t2],1\n\t"
+ "dsrlv\t%[rv],%[t3],%[shift]\n\t"
+ "dsllv\t%[t1],%[t2],%[t1]\n\t"
+ "or\t%[rv],%[t1],%[rv]\n\t"
+ : [rv] "=&r" (rv), [t1] "=&r" (t1), [t2] "=&r" (t2), [t3] "=&r" (t3)
+ : [cnt] "r" (cnt), [mult] "r" (mult), [shift] "r" (shift)
+ : "hi", "lo");
+ return rv;
+#else
+ /* GCC > 4.3 do it the easy way. */
+ unsigned int __attribute__((mode(TI))) t;
+ t = read_c0_cvmcount();
+ t = t * clocksource_mips.mult;
+ return (unsigned long long)(t >> clocksource_mips.shift);
+#endif
+}
+
void __init plat_time_init(void)
{
clocksource_mips.rating = 300;