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authorMark.Zhan <rongkai.zhan@windriver.com>2006-06-20 18:15:02 +0800
committerRalf Baechle <ralf@linux-mips.org>2006-06-29 21:10:34 +0100
commit9247857f5acadf0ea87fd6a9514c633644634f08 (patch)
tree77ce13d9b8ef0076622a0225ac6b8b1607a80260 /arch/mips/gt64120/wrppmc/irq.c
parent0a6047eef1c465c38aacfbdab193161b3f0cd144 (diff)
[MIPS] Fix the build error of Wind River PPMC board, rewrite irq code to C
o Fix the build error Wind River PPMC board caused by the change of plat_setup hook interface. o Rewrite first level interrupt dispatch code to C. Signed-off-by: Rongkai.Zhan <rongkai.zhan@windriver.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/gt64120/wrppmc/irq.c')
-rw-r--r--arch/mips/gt64120/wrppmc/irq.c17
1 files changed, 13 insertions, 4 deletions
diff --git a/arch/mips/gt64120/wrppmc/irq.c b/arch/mips/gt64120/wrppmc/irq.c
index 8605687e24e..26cf360f169 100644
--- a/arch/mips/gt64120/wrppmc/irq.c
+++ b/arch/mips/gt64120/wrppmc/irq.c
@@ -30,7 +30,19 @@
#include <asm/irq_cpu.h>
#include <asm/gt64120.h>
-extern asmlinkage void handle_IRQ(void);
+asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
+{
+ unsigned int pending = read_c0_status() & read_c0_cause();
+
+ if (pending & STATUSF_IP7)
+ do_IRQ(WRPPMC_MIPS_TIMER_IRQ, regs); /* CPU Compare/Count internal timer */
+ else if (pending & STATUSF_IP6)
+ do_IRQ(WRPPMC_UART16550_IRQ, regs); /* UART 16550 port */
+ else if (pending & STATUSF_IP3)
+ do_IRQ(WRPPMC_PCI_INTA_IRQ, regs); /* PCI INT_A */
+ else
+ spurious_interrupt(regs);
+}
/**
* Initialize GT64120 Interrupt Controller
@@ -53,9 +65,6 @@ void __init arch_init_irq(void)
/* enable all CPU interrupt bits. */
set_c0_status(ST0_IM); /* IE bit is still 0 */
- /* Install MIPS Interrupt Trap Vector */
- set_except_vector(0, handle_IRQ);
-
/* IRQ 0 - 7 are for MIPS common irq_cpu controller */
mips_cpu_irq_init(0);