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authorIngo Molnar <mingo@elte.hu>2009-06-01 21:06:21 +0200
committerIngo Molnar <mingo@elte.hu>2009-06-01 21:06:21 +0200
commit3d58f48ba05caed9118bce62b3047f8683438835 (patch)
tree94c911034f0e14ded73d3e9e6e9f8e22b6cad822 /arch/mips/include/asm/cpu-features.h
parentabfe0af9813153bae8c85d9bac966bafcb8ddab1 (diff)
parentd9244b5d2fbfe9fa540024b410047af13ceec90f (diff)
Merge branch 'linus' into irq/numa
Conflicts: arch/mips/sibyte/bcm1480/irq.c arch/mips/sibyte/sb1250/irq.c Merge reason: we gathered a few conflicts plus update to latest upstream fixes. Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/mips/include/asm/cpu-features.h')
-rw-r--r--arch/mips/include/asm/cpu-features.h9
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/mips/include/asm/cpu-features.h b/arch/mips/include/asm/cpu-features.h
index a0d14f85b78..c0047f86133 100644
--- a/arch/mips/include/asm/cpu-features.h
+++ b/arch/mips/include/asm/cpu-features.h
@@ -147,6 +147,15 @@
#define cpu_has_mips_r (cpu_has_mips32r1 | cpu_has_mips32r2 | \
cpu_has_mips64r1 | cpu_has_mips64r2)
+/*
+ * MIPS32, MIPS64, VR5500, IDT32332, IDT32334 and maybe a few other
+ * pre-MIPS32/MIPS53 processors have CLO, CLZ. For 64-bit kernels
+ * cpu_has_clo_clz also indicates the availability of DCLO and DCLZ.
+ */
+# ifndef cpu_has_clo_clz
+# define cpu_has_clo_clz cpu_has_mips_r
+# endif
+
#ifndef cpu_has_dsp
#define cpu_has_dsp (cpu_data[0].ases & MIPS_ASE_DSP)
#endif