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authorLinus Torvalds <torvalds@linux-foundation.org>2008-10-11 09:19:02 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2008-10-11 09:19:02 -0700
commit835a1c092432b3293ba6c4dec45ee6869c6f61fd (patch)
treea48582e4e4de3a8924b700c5ccaae78cd299cd73 /arch/mips/include/asm/dec/kn03.h
parentd3570a5a7b8d0604fa012129f92637dc1534f62c (diff)
parent9609e74093abd9f61fb1d20a8915a8ea87c77d5a (diff)
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (49 commits) MIPS: RB532: provide GPIO_BUILTIN_NR and irq_to_gpio/gpio_to_irq MIPS: Move ptrace prototypes to ptrace.h MIPS: Ptrace support for HARDWARE_WATCHPOINTS MIPS: Scheduler support for HARDWARE_WATCHPOINTS. MIPS: Watch exception handling for HARDWARE_WATCHPOINTS. MIPS: Probe watch registers and report configuration. MIPS: Add HARDWARE_WATCHPOINTS definitions and support code. MIPS: Add HARDWARE_WATCHPOINTS configure option. MIPS: Replace use of <asm-generic/uaccess.h> with native implementations. MIPS: TXx9: Add TX4939 ATA support (v2) MIPS: Rewrite spinlocks to ticket locks. MIPS: IP checksums: Optimize adjust of sum on buffers of odd alignment. MIPS: IP checksums: Remove unncessary .set pseudos MIPS: IP checksums: Remove unncessary folding of sum to 16 bit. MIPS: Move headfiles to new location below arch/mips/include MIPS: Alchemy: rename directory MIPS: Optimize get_user and put_user for 64-bit MIPS: TXx9: Implement prom_free_prom_memory MIPS: TXx9: Add RBTX4939 board support MIPS: TXx9: Add TX4939 SoC support ...
Diffstat (limited to 'arch/mips/include/asm/dec/kn03.h')
-rw-r--r--arch/mips/include/asm/dec/kn03.h74
1 files changed, 74 insertions, 0 deletions
diff --git a/arch/mips/include/asm/dec/kn03.h b/arch/mips/include/asm/dec/kn03.h
new file mode 100644
index 00000000000..edede923ffb
--- /dev/null
+++ b/arch/mips/include/asm/dec/kn03.h
@@ -0,0 +1,74 @@
+/*
+ * Hardware info about DECstation 5000/2x0 systems (otherwise known as
+ * 3max+) and DECsystem 5900 systems (otherwise known as bigmax) which
+ * differ mechanically but are otherwise identical (both are known as
+ * KN03).
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1995,1996 by Paul M. Antoine, some code and definitions
+ * are by courtesy of Chris Fraser.
+ * Copyright (C) 2000, 2002, 2003, 2005 Maciej W. Rozycki
+ */
+#ifndef __ASM_MIPS_DEC_KN03_H
+#define __ASM_MIPS_DEC_KN03_H
+
+#include <asm/dec/ecc.h>
+#include <asm/dec/ioasic_addrs.h>
+
+#define KN03_SLOT_BASE 0x1f800000
+
+/*
+ * CPU interrupt bits.
+ */
+#define KN03_CPU_INR_HALT 6 /* HALT button */
+#define KN03_CPU_INR_BUS 5 /* memory, I/O bus read/write errors */
+#define KN03_CPU_INR_RES_4 4 /* unused */
+#define KN03_CPU_INR_RTC 3 /* DS1287 RTC */
+#define KN03_CPU_INR_CASCADE 2 /* I/O ASIC cascade */
+
+/*
+ * I/O ASIC interrupt bits. Star marks denote non-IRQ status bits.
+ */
+#define KN03_IO_INR_3MAXP 15 /* (*) 3max+/bigmax ID */
+#define KN03_IO_INR_NVRAM 14 /* (*) NVRAM clear jumper */
+#define KN03_IO_INR_TC2 13 /* TURBOchannel slot #2 */
+#define KN03_IO_INR_TC1 12 /* TURBOchannel slot #1 */
+#define KN03_IO_INR_TC0 11 /* TURBOchannel slot #0 */
+#define KN03_IO_INR_NRMOD 10 /* (*) NRMOD manufacturing jumper */
+#define KN03_IO_INR_ASC 9 /* ASC (NCR53C94) SCSI */
+#define KN03_IO_INR_LANCE 8 /* LANCE (Am7990) Ethernet */
+#define KN03_IO_INR_SCC1 7 /* SCC (Z85C30) serial #1 */
+#define KN03_IO_INR_SCC0 6 /* SCC (Z85C30) serial #0 */
+#define KN03_IO_INR_RTC 5 /* DS1287 RTC */
+#define KN03_IO_INR_PSU 4 /* power supply unit warning */
+#define KN03_IO_INR_RES_3 3 /* unused */
+#define KN03_IO_INR_ASC_DATA 2 /* SCSI data ready (for PIO) */
+#define KN03_IO_INR_PBNC 1 /* ~HALT button debouncer */
+#define KN03_IO_INR_PBNO 0 /* HALT button debouncer */
+
+
+/*
+ * Memory Control Register bits.
+ */
+#define KN03_MCR_RES_16 (0xffff<<16) /* unused */
+#define KN03_MCR_DIAGCHK (1<<15) /* diagn/norml ECC reads */
+#define KN03_MCR_DIAGGEN (1<<14) /* diagn/norml ECC writes */
+#define KN03_MCR_CORRECT (1<<13) /* ECC correct/check */
+#define KN03_MCR_RES_11 (0x3<<12) /* unused */
+#define KN03_MCR_BNK32M (1<<10) /* 32M/8M stride */
+#define KN03_MCR_RES_7 (0x7<<7) /* unused */
+#define KN03_MCR_CHECK (0x7f<<0) /* diagnostic check bits */
+
+/*
+ * I/O ASIC System Support Register bits.
+ */
+#define KN03_IO_SSR_TXDIS1 (1<<14) /* SCC1 transmit disable */
+#define KN03_IO_SSR_TXDIS0 (1<<13) /* SCC0 transmit disable */
+#define KN03_IO_SSR_RES_12 (1<<12) /* unused */
+
+#define KN03_IO_SSR_LEDS (0xff<<0) /* ~diagnostic LEDs */
+
+#endif /* __ASM_MIPS_DEC_KN03_H */