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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2008-10-15 11:31:54 +1100
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2008-10-15 11:31:54 +1100
commit6dc6472581f693b5fc95aebedf67b4960fb85cf0 (patch)
tree06a5a9a08519950575505273eabced331ed51405 /arch/mips/include/asm/edac.h
parentee673eaa72d8d185012b1027a05e25aba18c267f (diff)
parent8acd3a60bcca17c6d89c73cee3ad6057eb83ba1e (diff)
Merge commit 'origin'
Manual fixup of conflicts on: arch/powerpc/include/asm/dcr-regs.h drivers/net/ibm_newemac/core.h
Diffstat (limited to 'arch/mips/include/asm/edac.h')
-rw-r--r--arch/mips/include/asm/edac.h34
1 files changed, 34 insertions, 0 deletions
diff --git a/arch/mips/include/asm/edac.h b/arch/mips/include/asm/edac.h
new file mode 100644
index 00000000000..4da0c1fe30d
--- /dev/null
+++ b/arch/mips/include/asm/edac.h
@@ -0,0 +1,34 @@
+#ifndef ASM_EDAC_H
+#define ASM_EDAC_H
+
+/* ECC atomic, DMA, SMP and interrupt safe scrub function */
+
+static inline void atomic_scrub(void *va, u32 size)
+{
+ unsigned long *virt_addr = va;
+ unsigned long temp;
+ u32 i;
+
+ for (i = 0; i < size / sizeof(unsigned long); i++) {
+ /*
+ * Very carefully read and write to memory atomically
+ * so we are interrupt, DMA and SMP safe.
+ *
+ * Intel: asm("lock; addl $0, %0"::"m"(*virt_addr));
+ */
+
+ __asm__ __volatile__ (
+ " .set mips2 \n"
+ "1: ll %0, %1 # atomic_scrub \n"
+ " addu %0, $0 \n"
+ " sc %0, %1 \n"
+ " beqz %0, 1b \n"
+ " .set mips0 \n"
+ : "=&r" (temp), "=m" (*virt_addr)
+ : "m" (*virt_addr));
+
+ virt_addr++;
+ }
+}
+
+#endif