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authorDavid S. Miller <davem@davemloft.net>2011-04-11 13:44:25 -0700
committerDavid S. Miller <davem@davemloft.net>2011-04-11 13:44:25 -0700
commit1c01a80cfec6f806246f31ff2680cd3639b30e67 (patch)
tree0b554aad2ec1da71ecf6339d4ba51617bfe1dc3c /arch/mips/include/asm/io.h
parentc44d79950b2daa1025e62eede73e4e4a274d1ef3 (diff)
parent4a9f65f6304a00f6473e83b19c1e83caa1e42530 (diff)
Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/davem/net-2.6
Conflicts: drivers/net/smsc911x.c
Diffstat (limited to 'arch/mips/include/asm/io.h')
-rw-r--r--arch/mips/include/asm/io.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h
index 5b017f23e24..b04e4de5dd2 100644
--- a/arch/mips/include/asm/io.h
+++ b/arch/mips/include/asm/io.h
@@ -242,7 +242,7 @@ static inline void __iomem * __ioremap_mode(phys_t offset, unsigned long size,
* This version of ioremap ensures that the memory is marked uncachable
* on the CPU as well as honouring existing caching rules from things like
* the PCI bus. Note that there are other caches and buffers on many
- * busses. In paticular driver authors should read up on PCI writes
+ * busses. In particular driver authors should read up on PCI writes
*
* It's useful if some control registers are in such an area and
* write combining or read caching is not desirable: