diff options
author | Ingo Molnar <mingo@elte.hu> | 2009-01-18 18:15:49 +0100 |
---|---|---|
committer | Ingo Molnar <mingo@elte.hu> | 2009-01-18 18:15:49 +0100 |
commit | af37501c792107c2bde1524bdae38d9a247b841a (patch) | |
tree | b50ee90d29e72956b8b7d8d19677fe5996755d49 /arch/mips/include/asm/io.h | |
parent | d859e29fe34cb833071b20aef860ee94fbad9bb2 (diff) | |
parent | 99937d6455cea95405ac681c86a857d0fcd530bd (diff) |
Merge branch 'core/percpu' into perfcounters/core
Conflicts:
arch/x86/include/asm/pda.h
We merge tip/core/percpu into tip/perfcounters/core because of a
semantic and contextual conflict: the former eliminates the PDA,
while the latter extends it with apic_perf_irqs field.
Resolve the conflict by moving the new field to the irq_cpustat
structure on 64-bit too.
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/mips/include/asm/io.h')
-rw-r--r-- | arch/mips/include/asm/io.h | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h index 501a40b9f18..436878e4e06 100644 --- a/arch/mips/include/asm/io.h +++ b/arch/mips/include/asm/io.h @@ -295,6 +295,12 @@ static inline void iounmap(const volatile void __iomem *addr) #undef __IS_KSEG1 } +#ifdef CONFIG_CPU_CAVIUM_OCTEON +#define war_octeon_io_reorder_wmb() wmb() +#else +#define war_octeon_io_reorder_wmb() do { } while (0) +#endif + #define __BUILD_MEMORY_SINGLE(pfx, bwlq, type, irq) \ \ static inline void pfx##write##bwlq(type val, \ @@ -303,6 +309,8 @@ static inline void pfx##write##bwlq(type val, \ volatile type *__mem; \ type __val; \ \ + war_octeon_io_reorder_wmb(); \ + \ __mem = (void *)__swizzle_addr_##bwlq((unsigned long)(mem)); \ \ __val = pfx##ioswab##bwlq(__mem, val); \ @@ -370,6 +378,8 @@ static inline void pfx##out##bwlq##p(type val, unsigned long port) \ volatile type *__addr; \ type __val; \ \ + war_octeon_io_reorder_wmb(); \ + \ __addr = (void *)__swizzle_addr_##bwlq(mips_io_port_base + port); \ \ __val = pfx##ioswab##bwlq(__addr, val); \ @@ -504,8 +514,12 @@ BUILDSTRING(q, u64) #endif +#ifdef CONFIG_CPU_CAVIUM_OCTEON +#define mmiowb() wmb() +#else /* Depends on MIPS II instruction set */ #define mmiowb() asm volatile ("sync" ::: "memory") +#endif static inline void memset_io(volatile void __iomem *addr, unsigned char val, int count) { |