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authorRalf Baechle <ralf@linux-mips.org>2014-03-31 18:17:33 +0200
committerRalf Baechle <ralf@linux-mips.org>2014-03-31 18:17:33 +0200
commitade63aada79c61bcd5f51cbd310f237399892268 (patch)
tree4f8605528bfd9b6261679883974b9ac4870223dd /arch/mips/include/asm/mach-au1x00/au1000.h
parent9a1724c7506bfa7d3d9dcab13f83e9e6446929f9 (diff)
parentc14af233fbe279d0e561ecf84f1208b1bae087ef (diff)
Merge branch '3.14-fixes' into mips-for-linux-next
Diffstat (limited to 'arch/mips/include/asm/mach-au1x00/au1000.h')
-rw-r--r--arch/mips/include/asm/mach-au1x00/au1000.h12
1 files changed, 0 insertions, 12 deletions
diff --git a/arch/mips/include/asm/mach-au1x00/au1000.h b/arch/mips/include/asm/mach-au1x00/au1000.h
index 54f9e84db8a..b4c3ecb17d4 100644
--- a/arch/mips/include/asm/mach-au1x00/au1000.h
+++ b/arch/mips/include/asm/mach-au1x00/au1000.h
@@ -1161,18 +1161,6 @@ enum soc_au1200_ints {
#define MAC_RX_BUFF3_STATUS 0x30
#define MAC_RX_BUFF3_ADDR 0x34
-#define UART_RX 0 /* Receive buffer */
-#define UART_TX 4 /* Transmit buffer */
-#define UART_IER 8 /* Interrupt Enable Register */
-#define UART_IIR 0xC /* Interrupt ID Register */
-#define UART_FCR 0x10 /* FIFO Control Register */
-#define UART_LCR 0x14 /* Line Control Register */
-#define UART_MCR 0x18 /* Modem Control Register */
-#define UART_LSR 0x1C /* Line Status Register */
-#define UART_MSR 0x20 /* Modem Status Register */
-#define UART_CLK 0x28 /* Baud Rate Clock Divider */
-#define UART_MOD_CNTRL 0x100 /* Module Control */
-
/* SSIO */
#define SSI0_STATUS 0xB1600000
# define SSI_STATUS_BF (1 << 4)