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authorManuel Lauss <manuel.lauss@googlemail.com>2011-08-02 19:51:03 +0200
committerRalf Baechle <ralf@linux-mips.org>2011-10-24 23:34:23 +0100
commitce1d43b9a9e8a3db8fe91696c0b0e3ac1a154e34 (patch)
tree7e47005c61e98f44005c17a636457c4398c73fdd /arch/mips/include/asm/mach-au1x00/gpio-au1000.h
parent2e8fd2e5efe6b7cebba0beec44c6c2f474c6b726 (diff)
MIPS: Alchemy: support multiple GPIO styles in one kernel
For GPIOLIB=y decide at runtime which gpiochips to register; in the GPIOLIB=n case, the gpio headers need to be reshuffled a bit to make multiple implementations coexist peacefully. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/2679/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include/asm/mach-au1x00/gpio-au1000.h')
-rw-r--r--arch/mips/include/asm/mach-au1x00/gpio-au1000.h31
1 files changed, 2 insertions, 29 deletions
diff --git a/arch/mips/include/asm/mach-au1x00/gpio-au1000.h b/arch/mips/include/asm/mach-au1x00/gpio-au1000.h
index 1f41a522906..73853b5a2a3 100644
--- a/arch/mips/include/asm/mach-au1x00/gpio-au1000.h
+++ b/arch/mips/include/asm/mach-au1x00/gpio-au1000.h
@@ -347,17 +347,6 @@ static inline int alchemy_gpio2_to_irq(int gpio)
/**********************************************************************/
-/* On Au1000, Au1500 and Au1100 GPIOs won't work as inputs before
- * SYS_PININPUTEN is written to at least once. On Au1550/Au1200 this
- * register enables use of GPIOs as wake source.
- */
-static inline void alchemy_gpio1_input_enable(void)
-{
- void __iomem *base = (void __iomem *)KSEG1ADDR(AU1000_SYS_PHYS_ADDR);
- __raw_writel(0, base + SYS_PININPUTEN); /* the write op is key */
- wmb();
-}
-
/* GPIO2 shared interrupts and control */
static inline void __alchemy_gpio2_mod_int(int gpio2, int en)
@@ -561,6 +550,7 @@ static inline int alchemy_irq_to_gpio(int irq)
#ifndef CONFIG_GPIOLIB
+#ifdef CONFIG_ALCHEMY_GPIOINT_AU1000
#ifndef CONFIG_ALCHEMY_GPIO_INDIRECT /* case (4) */
@@ -665,24 +655,7 @@ static inline void gpio_unexport(unsigned gpio)
#endif /* !CONFIG_ALCHEMY_GPIO_INDIRECT */
-
-#else /* CONFIG GPIOLIB */
-
-
- /* using gpiolib to provide up to 2 gpio_chips for on-chip gpios */
-#ifndef CONFIG_ALCHEMY_GPIO_INDIRECT /* case (2) */
-
-/* get everything through gpiolib */
-#define gpio_to_irq __gpio_to_irq
-#define gpio_get_value __gpio_get_value
-#define gpio_set_value __gpio_set_value
-#define gpio_cansleep __gpio_cansleep
-#define irq_to_gpio alchemy_irq_to_gpio
-
-#include <asm-generic/gpio.h>
-
-#endif /* !CONFIG_ALCHEMY_GPIO_INDIRECT */
-
+#endif /* CONFIG_ALCHEMY_GPIOINT_AU1000 */
#endif /* !CONFIG_GPIOLIB */