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authorIngo Molnar <mingo@elte.hu>2008-10-12 12:43:21 +0200
committerIngo Molnar <mingo@elte.hu>2008-10-12 12:43:21 +0200
commitacbaa41a780490c791492c41144c774c04875af1 (patch)
tree31f1f046875eb071e2aed031e5d9d1584742314f /arch/mips/include/asm/mach-bcm47xx/war.h
parent8d89adf44cf750e49691ba5b744b2ad77a05e997 (diff)
parentfd048088306656824958e7783ffcee27e241b361 (diff)
Merge branch 'linus' into x86/quirks
Conflicts: arch/x86/kernel/early-quirks.c
Diffstat (limited to 'arch/mips/include/asm/mach-bcm47xx/war.h')
-rw-r--r--arch/mips/include/asm/mach-bcm47xx/war.h25
1 files changed, 25 insertions, 0 deletions
diff --git a/arch/mips/include/asm/mach-bcm47xx/war.h b/arch/mips/include/asm/mach-bcm47xx/war.h
new file mode 100644
index 00000000000..4a2b7986b58
--- /dev/null
+++ b/arch/mips/include/asm/mach-bcm47xx/war.h
@@ -0,0 +1,25 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
+ */
+#ifndef __ASM_MIPS_MACH_BCM947XX_WAR_H
+#define __ASM_MIPS_MACH_BCM947XX_WAR_H
+
+#define R4600_V1_INDEX_ICACHEOP_WAR 0
+#define R4600_V1_HIT_CACHEOP_WAR 0
+#define R4600_V2_HIT_CACHEOP_WAR 0
+#define R5432_CP0_INTERRUPT_WAR 0
+#define BCM1250_M3_WAR 0
+#define SIBYTE_1956_WAR 0
+#define MIPS4K_ICACHE_REFILL_WAR 0
+#define MIPS_CACHE_SYNC_WAR 0
+#define TX49XX_ICACHE_INDEX_INV_WAR 0
+#define RM9000_CDEX_SMP_WAR 0
+#define ICACHE_REFILLS_WORKAROUND_WAR 0
+#define R10000_LLSC_WAR 0
+#define MIPS34K_MISSED_ITLB_WAR 0
+
+#endif /* __ASM_MIPS_MACH_BCM947XX_WAR_H */