diff options
author | Ralf Baechle <ralf@linux-mips.org> | 2012-12-13 19:40:13 +0100 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2012-12-13 19:40:13 +0100 |
commit | 241738bd51cb0efe58e6c570223153e970afe3ae (patch) | |
tree | 05263e1ec3fbd58cc4ba5ee69163612fbb769a4a /arch/mips/include/asm/mach-lantiq | |
parent | bdf20507da11a9a5b32ef04fa09f352828189aef (diff) | |
parent | ce8f0d0607bcad3ec0e8599be80353204427093e (diff) |
Merge branch 'mips-next' of http://dev.phrozen.org/githttp/mips-next into mips-for-linux-next
Diffstat (limited to 'arch/mips/include/asm/mach-lantiq')
-rw-r--r-- | arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h index 6a2df709c57..133336b493b 100644 --- a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h +++ b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h @@ -82,6 +82,9 @@ extern __iomem void *ltq_cgu_membase; #define LTQ_MPS_BASE_ADDR (KSEG1 + 0x1F107000) #define LTQ_MPS_CHIPID ((u32 *)(LTQ_MPS_BASE_ADDR + 0x0344)) +/* allow booting xrx200 phys */ +int xrx200_gphy_boot(struct device *dev, unsigned int id, dma_addr_t dev_addr); + /* request a non-gpio and set the PIO config */ #define PMU_PPE BIT(13) extern void ltq_pmu_enable(unsigned int module); |