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authorLinus Torvalds <torvalds@linux-foundation.org>2009-09-17 20:52:32 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2009-09-17 20:52:32 -0700
commit3dc95666df0e1ae5b7381a8ec97a583bb3ce4306 (patch)
treefc1b277f507c48b8c29536947e1de5c2eeda9325 /arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h
parentb938fb6f491113880ebaabfa06c6446723c702fd (diff)
parent9b1fc55a05006523bced65f4d99f7072831ff56a (diff)
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (51 commits) MIPS: BCM63xx: Add integrated ethernet mac support. MIPS: BCM63xx: Add support for the Broadcom BCM63xx family of SOCs. MIPS: BCM63xx: Add Broadcom 63xx CPU definitions. MIPS: Octeon: Move some platform device registration to its own file. MIPS: Don't corrupt page tables on vmalloc fault. MIPS: Shrink the size of tlb handler MIPS: Alchemy: override loops_per_jiffy detection MIPS: hw_random: Add hardware RNG for Octeon SOCs. MIPS: Octeon: Add hardware RNG platform device. MIPS: Remove useless zero initializations. MIPS: Alchemy: get rid of allow_au1k_wait MIPS: Octeon: Set kernel_uses_llsc to false on non-SMP builds. MIPS: Allow kernel use of LL/SC to be separate from the presence of LL/SC. MIPS: Get rid of CONFIG_CPU_HAS_LLSC MIPS: Malta: Remove pointless use use of CONFIG_CPU_HAS_LLSC MIPS: Rewrite clearing of ll_bit on context switch in C MIPS: Rewrite sysmips(MIPS_ATOMIC_SET, ...) in C with inline assembler MIPS: Consolidate all CONFIG_CPU_HAS_LLSC use in a single C file. MIPS: Clean up linker script using new linker script macros. MIPS: Use PAGE_SIZE in assembly instead of _PAGE_SIZE. ...
Diffstat (limited to 'arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h')
-rw-r--r--arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h59
1 files changed, 59 insertions, 0 deletions
diff --git a/arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h b/arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h
new file mode 100644
index 00000000000..ce5b6e270e3
--- /dev/null
+++ b/arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h
@@ -0,0 +1,59 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2009 Wu Zhangjin <wuzj@lemote.com>
+ * Copyright (C) 2009 Philippe Vachon <philippe@cowpig.ca>
+ * Copyright (C) 2009 Zhang Le <r0bertz@gentoo.org>
+ *
+ * reference: /proc/cpuinfo,
+ * arch/mips/kernel/cpu-probe.c(cpu_probe_legacy),
+ * arch/mips/kernel/proc.c(show_cpuinfo),
+ * loongson2f user manual.
+ */
+
+#ifndef __ASM_MACH_LOONGSON_CPU_FEATURE_OVERRIDES_H
+#define __ASM_MACH_LOONGSON_CPU_FEATURE_OVERRIDES_H
+
+#define cpu_dcache_line_size() 32
+#define cpu_icache_line_size() 32
+#define cpu_scache_line_size() 32
+
+
+#define cpu_has_32fpr 1
+#define cpu_has_3k_cache 0
+#define cpu_has_4k_cache 1
+#define cpu_has_4kex 1
+#define cpu_has_64bits 1
+#define cpu_has_cache_cdex_p 0
+#define cpu_has_cache_cdex_s 0
+#define cpu_has_counter 1
+#define cpu_has_dc_aliases 1
+#define cpu_has_divec 0
+#define cpu_has_dsp 0
+#define cpu_has_ejtag 0
+#define cpu_has_fpu 1
+#define cpu_has_ic_fills_f_dc 0
+#define cpu_has_inclusive_pcaches 1
+#define cpu_has_llsc 1
+#define cpu_has_mcheck 0
+#define cpu_has_mdmx 0
+#define cpu_has_mips16 0
+#define cpu_has_mips32r1 0
+#define cpu_has_mips32r2 0
+#define cpu_has_mips3d 0
+#define cpu_has_mips64r1 0
+#define cpu_has_mips64r2 0
+#define cpu_has_mipsmt 0
+#define cpu_has_prefetch 0
+#define cpu_has_smartmips 0
+#define cpu_has_tlb 1
+#define cpu_has_tx39_cache 0
+#define cpu_has_userlocal 0
+#define cpu_has_vce 0
+#define cpu_has_vtag_icache 0
+#define cpu_has_watch 1
+#define cpu_icache_snoops_remote_store 1
+
+#endif /* __ASM_MACH_LOONGSON_CPU_FEATURE_OVERRIDES_H */