diff options
| author | Steven J. Hill <sjhill@mips.com> | 2012-09-24 09:48:53 -0500 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2012-09-25 16:04:54 +0200 |
| commit | b30fdd6f7395b0cae748396ac5f857f16bb0385d (patch) | |
| tree | 3556c0a2089a348ceaaff09a8fa780125344bb20 /arch/mips/include/asm/mips-boards | |
| parent | b1c561845dc969ab05cb080a6abb0d394d52d8c1 (diff) | |
MIPS: MIPSsim: Remove the MIPSsim platform.
The MIPSsim platform is no longer supported or used.
[ralf@linux-mips.org: Also remove mipssim from arch/mips/Kbuild.platforms
and delete arch/mips/include/asm/mach-mipssim/*.]
Signed-off-by: Steven J. Hill <sjhill@mips.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/4350/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include/asm/mips-boards')
| -rw-r--r-- | arch/mips/include/asm/mips-boards/simint.h | 31 |
1 files changed, 0 insertions, 31 deletions
diff --git a/arch/mips/include/asm/mips-boards/simint.h b/arch/mips/include/asm/mips-boards/simint.h deleted file mode 100644 index 8ef6db76d5c..00000000000 --- a/arch/mips/include/asm/mips-boards/simint.h +++ /dev/null @@ -1,31 +0,0 @@ -/* - * Copyright (C) 2005 MIPS Technologies, Inc. All rights reserved. - * - * This program is free software; you can distribute it and/or modify it - * under the terms of the GNU General Public License (Version 2) as - * published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License - * for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. - */ -#ifndef _MIPS_SIMINT_H -#define _MIPS_SIMINT_H - -#include <irq.h> - -#define SIM_INT_BASE 0 -#define MIPSCPU_INT_MB0 2 -#define MIPS_CPU_TIMER_IRQ 7 - - -#define MSC01E_INT_BASE 64 - -#define MSC01E_INT_CPUCTR 11 - -#endif |