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authorDavid Daney <david.daney@cavium.com>2012-04-04 15:34:41 -0700
committerDavid Daney <david.daney@cavium.com>2012-08-31 10:46:54 -0700
commit88fd85892a55730878fc081eee62553eb18f1b9c (patch)
tree804e3017ac80929504c3035e66b393fd286da98c /arch/mips/include/asm/octeon
parent9787c56ee376bfc3ed110c2723462361b700d7d2 (diff)
MIPS: OCTEON: Add support for cn68XX interrupt controller.
The cn68XX has a new interrupt controller named CIU2, add support for this, and use it if cn68XX detected at runtime. Signed-off-by: David Daney <david.daney@cavium.com>
Diffstat (limited to 'arch/mips/include/asm/octeon')
-rw-r--r--arch/mips/include/asm/octeon/octeon.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/mips/include/asm/octeon/octeon.h b/arch/mips/include/asm/octeon/octeon.h
index 1e2486e2357..e937e86e853 100644
--- a/arch/mips/include/asm/octeon/octeon.h
+++ b/arch/mips/include/asm/octeon/octeon.h
@@ -254,4 +254,7 @@ extern uint64_t octeon_bootloader_entry_addr;
extern void (*octeon_irq_setup_secondary)(void);
+typedef void (*octeon_irq_ip4_handler_t)(void);
+void octeon_irq_set_ip4_handler(octeon_irq_ip4_handler_t);
+
#endif /* __ASM_OCTEON_OCTEON_H */