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| author | Ingo Molnar <mingo@elte.hu> | 2008-10-12 11:32:17 +0200 |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2008-10-12 11:32:17 +0200 |
| commit | 206855c321adee56db3946ca09a5887cddb9d598 (patch) | |
| tree | 13a2729d4d0e37170552bd9ad3c6bba71ba0c55c /arch/mips/include/asm/pmc-sierra/msp71xx/war.h | |
| parent | e8d3f455de4f42d4bab2f6f1aeb2cf3bd18eb508 (diff) | |
| parent | cb58ffc3889f0545628f138f849e759a331b8ddc (diff) | |
Merge branch 'x86/urgent' into core/signal
Conflicts:
arch/x86/kernel/signal_64.c
Diffstat (limited to 'arch/mips/include/asm/pmc-sierra/msp71xx/war.h')
| -rw-r--r-- | arch/mips/include/asm/pmc-sierra/msp71xx/war.h | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/arch/mips/include/asm/pmc-sierra/msp71xx/war.h b/arch/mips/include/asm/pmc-sierra/msp71xx/war.h new file mode 100644 index 00000000000..0bf48fc1892 --- /dev/null +++ b/arch/mips/include/asm/pmc-sierra/msp71xx/war.h @@ -0,0 +1,28 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org> + */ +#ifndef __ASM_MIPS_PMC_SIERRA_WAR_H +#define __ASM_MIPS_PMC_SIERRA_WAR_H + +#define R4600_V1_INDEX_ICACHEOP_WAR 0 +#define R4600_V1_HIT_CACHEOP_WAR 0 +#define R4600_V2_HIT_CACHEOP_WAR 0 +#define R5432_CP0_INTERRUPT_WAR 0 +#define BCM1250_M3_WAR 0 +#define SIBYTE_1956_WAR 0 +#define MIPS4K_ICACHE_REFILL_WAR 0 +#define MIPS_CACHE_SYNC_WAR 0 +#define TX49XX_ICACHE_INDEX_INV_WAR 0 +#define RM9000_CDEX_SMP_WAR 0 +#define ICACHE_REFILLS_WORKAROUND_WAR 0 +#define R10000_LLSC_WAR 0 +#if defined(CONFIG_PMC_MSP7120_EVAL) || defined(CONFIG_PMC_MSP7120_GW) || \ + defined(CONFIG_PMC_MSP7120_FPGA) +#define MIPS34K_MISSED_ITLB_WAR 1 +#endif + +#endif /* __ASM_MIPS_PMC_SIERRA_WAR_H */ |