diff options
| author | Linus Torvalds <torvalds@linux-foundation.org> | 2009-09-17 20:52:32 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2009-09-17 20:52:32 -0700 |
| commit | 3dc95666df0e1ae5b7381a8ec97a583bb3ce4306 (patch) | |
| tree | fc1b277f507c48b8c29536947e1de5c2eeda9325 /arch/mips/include/asm/system.h | |
| parent | b938fb6f491113880ebaabfa06c6446723c702fd (diff) | |
| parent | 9b1fc55a05006523bced65f4d99f7072831ff56a (diff) | |
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (51 commits)
MIPS: BCM63xx: Add integrated ethernet mac support.
MIPS: BCM63xx: Add support for the Broadcom BCM63xx family of SOCs.
MIPS: BCM63xx: Add Broadcom 63xx CPU definitions.
MIPS: Octeon: Move some platform device registration to its own file.
MIPS: Don't corrupt page tables on vmalloc fault.
MIPS: Shrink the size of tlb handler
MIPS: Alchemy: override loops_per_jiffy detection
MIPS: hw_random: Add hardware RNG for Octeon SOCs.
MIPS: Octeon: Add hardware RNG platform device.
MIPS: Remove useless zero initializations.
MIPS: Alchemy: get rid of allow_au1k_wait
MIPS: Octeon: Set kernel_uses_llsc to false on non-SMP builds.
MIPS: Allow kernel use of LL/SC to be separate from the presence of LL/SC.
MIPS: Get rid of CONFIG_CPU_HAS_LLSC
MIPS: Malta: Remove pointless use use of CONFIG_CPU_HAS_LLSC
MIPS: Rewrite clearing of ll_bit on context switch in C
MIPS: Rewrite sysmips(MIPS_ATOMIC_SET, ...) in C with inline assembler
MIPS: Consolidate all CONFIG_CPU_HAS_LLSC use in a single C file.
MIPS: Clean up linker script using new linker script macros.
MIPS: Use PAGE_SIZE in assembly instead of _PAGE_SIZE.
...
Diffstat (limited to 'arch/mips/include/asm/system.h')
| -rw-r--r-- | arch/mips/include/asm/system.h | 18 |
1 files changed, 14 insertions, 4 deletions
diff --git a/arch/mips/include/asm/system.h b/arch/mips/include/asm/system.h index cd30f83235b..fcf5f98d90c 100644 --- a/arch/mips/include/asm/system.h +++ b/arch/mips/include/asm/system.h @@ -32,6 +32,9 @@ extern asmlinkage void *resume(void *last, void *next, void *next_ti); struct task_struct; +extern unsigned int ll_bit; +extern struct task_struct *ll_task; + #ifdef CONFIG_MIPS_MT_FPAFF /* @@ -63,11 +66,18 @@ do { \ #define __mips_mt_fpaff_switch_to(prev) do { (void) (prev); } while (0) #endif +#define __clear_software_ll_bit() \ +do { \ + if (!__builtin_constant_p(cpu_has_llsc) || !cpu_has_llsc) \ + ll_bit = 0; \ +} while (0) + #define switch_to(prev, next, last) \ do { \ __mips_mt_fpaff_switch_to(prev); \ if (cpu_has_dsp) \ __save_dsp(prev); \ + __clear_software_ll_bit(); \ (last) = resume(prev, next, task_thread_info(next)); \ } while (0) @@ -84,7 +94,7 @@ static inline unsigned long __xchg_u32(volatile int * m, unsigned int val) { __u32 retval; - if (cpu_has_llsc && R10000_LLSC_WAR) { + if (kernel_uses_llsc && R10000_LLSC_WAR) { unsigned long dummy; __asm__ __volatile__( @@ -99,7 +109,7 @@ static inline unsigned long __xchg_u32(volatile int * m, unsigned int val) : "=&r" (retval), "=m" (*m), "=&r" (dummy) : "R" (*m), "Jr" (val) : "memory"); - } else if (cpu_has_llsc) { + } else if (kernel_uses_llsc) { unsigned long dummy; __asm__ __volatile__( @@ -136,7 +146,7 @@ static inline __u64 __xchg_u64(volatile __u64 * m, __u64 val) { __u64 retval; - if (cpu_has_llsc && R10000_LLSC_WAR) { + if (kernel_uses_llsc && R10000_LLSC_WAR) { unsigned long dummy; __asm__ __volatile__( @@ -149,7 +159,7 @@ static inline __u64 __xchg_u64(volatile __u64 * m, __u64 val) : "=&r" (retval), "=m" (*m), "=&r" (dummy) : "R" (*m), "Jr" (val) : "memory"); - } else if (cpu_has_llsc) { + } else if (kernel_uses_llsc) { unsigned long dummy; __asm__ __volatile__( |