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authorAlexander Graf <agraf@suse.de>2012-10-31 13:36:18 +0100
committerAlexander Graf <agraf@suse.de>2012-10-31 13:36:18 +0100
commit0588000eac9ba4178cebade437da3b28e8fad48f (patch)
tree697e514a0a0193f17a54f372dd18c5cd3927e154 /arch/mips/include/uapi/asm/cachectl.h
parent8b5869ad85f703ffeb25e656eab826f6b85b984c (diff)
parent81c52c56e2b43589091ee29038bcf793d3f184ab (diff)
Merge commit 'origin/queue' into for-queue
Conflicts: arch/powerpc/include/asm/Kbuild arch/powerpc/include/uapi/asm/Kbuild
Diffstat (limited to 'arch/mips/include/uapi/asm/cachectl.h')
-rw-r--r--arch/mips/include/uapi/asm/cachectl.h26
1 files changed, 26 insertions, 0 deletions
diff --git a/arch/mips/include/uapi/asm/cachectl.h b/arch/mips/include/uapi/asm/cachectl.h
new file mode 100644
index 00000000000..f3ce721861d
--- /dev/null
+++ b/arch/mips/include/uapi/asm/cachectl.h
@@ -0,0 +1,26 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1994, 1995, 1996 by Ralf Baechle
+ */
+#ifndef _ASM_CACHECTL
+#define _ASM_CACHECTL
+
+/*
+ * Options for cacheflush system call
+ */
+#define ICACHE (1<<0) /* flush instruction cache */
+#define DCACHE (1<<1) /* writeback and flush data cache */
+#define BCACHE (ICACHE|DCACHE) /* flush both caches */
+
+/*
+ * Caching modes for the cachectl(2) call
+ *
+ * cachectl(2) is currently not supported and returns ENOSYS.
+ */
+#define CACHEABLE 0 /* make pages cacheable */
+#define UNCACHEABLE 1 /* make pages uncacheable */
+
+#endif /* _ASM_CACHECTL */