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authorMarkos Chandras <markos.chandras@imgtec.com>2014-11-26 14:08:52 +0000
committerMarkos Chandras <markos.chandras@imgtec.com>2015-02-17 15:37:34 +0000
commitc893ce38b265d5787d03850b36221f595b224538 (patch)
tree9ebc726517a4eb3aee5c3a07f0f531f0704fc97a /arch/mips/include/uapi/asm/inst.h
parent8467ca0122e20f3f8e73d34907b8b30461af5d4e (diff)
MIPS: Emulate the new MIPS R6 BOVC, BEQC and BEQZALC instructions
MIPS R6 uses the <R6 ADDI opcode for the new BOVC, BEQC and BEQZALC instructions. Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Diffstat (limited to 'arch/mips/include/uapi/asm/inst.h')
-rw-r--r--arch/mips/include/uapi/asm/inst.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/include/uapi/asm/inst.h b/arch/mips/include/uapi/asm/inst.h
index 9ce5e34b9c6..782af0f8342 100644
--- a/arch/mips/include/uapi/asm/inst.h
+++ b/arch/mips/include/uapi/asm/inst.h
@@ -21,7 +21,7 @@
enum major_op {
spec_op, bcond_op, j_op, jal_op,
beq_op, bne_op, blez_op, bgtz_op,
- addi_op, addiu_op, slti_op, sltiu_op,
+ addi_op, cbcond0_op = addi_op, addiu_op, slti_op, sltiu_op,
andi_op, ori_op, xori_op, lui_op,
cop0_op, cop1_op, cop2_op, cop1x_op,
beql_op, bnel_op, blezl_op, bgtzl_op,