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authorDavid Daney <ddaney@caviumnetworks.com>2010-10-01 13:27:29 -0700
committerRalf Baechle <ralf@linux-mips.org>2010-10-29 19:08:29 +0100
commit57575b5c81d9ced1133719bba82a65440371a010 (patch)
tree7dac2f6d7e7da5ca3d679b4ae87ebd378065c02b /arch/mips/include
parentcfd570990f863de90a86da73ef7b7d84e5190647 (diff)
MIPS: Octeon: Adjust top of DMA32 zone.
On OCTEON, we reserve the last 256MB of 32-bit PCI address space, mapping the RAM in this region at a high DMA address. This makes memory in this region unavailable for 32-bit DMA. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Patchwork: http://patchwork.linux-mips.org/patch/1634/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include')
-rw-r--r--arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h b/arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h
index b952fc7215e..c84ed74e3c8 100644
--- a/arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h
@@ -81,4 +81,10 @@ static inline int octeon_has_saa(void)
return id >= 0x000d0300;
}
+/*
+ * The last 256MB are reserved for device to device mappings and the
+ * BAR1 hole.
+ */
+#define MAX_DMA32_PFN (((1ULL << 32) - (1ULL << 28)) >> PAGE_SHIFT)
+
#endif