diff options
author | Atsushi Nemoto <anemo@mba.ocn.ne.jp> | 2007-08-02 23:36:02 +0900 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2007-08-27 02:16:53 +0100 |
commit | c87abd75b35e8f991ff8ff1510d6fb62612c61fa (patch) | |
tree | de68c4446c35337c47c17253d769bfeee92f80b3 /arch/mips/jmr3927 | |
parent | 8420fd00e88ef4f6082866aa151bc753b006b3b6 (diff) |
[MIPS] Cleanup TX39/TX49 irq code
Cleanup jmr3927, tx4927 and tx4938 irq codes, using common IRQ_CPU,
I8259 and IRQ_TXX9 irq routines.
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/jmr3927')
-rw-r--r-- | arch/mips/jmr3927/rbhma3100/irq.c | 48 | ||||
-rw-r--r-- | arch/mips/jmr3927/rbhma3100/setup.c | 13 |
2 files changed, 3 insertions, 58 deletions
diff --git a/arch/mips/jmr3927/rbhma3100/irq.c b/arch/mips/jmr3927/rbhma3100/irq.c index 1187b44a3dd..d9efe692e55 100644 --- a/arch/mips/jmr3927/rbhma3100/irq.c +++ b/arch/mips/jmr3927/rbhma3100/irq.c @@ -45,9 +45,6 @@ #error JMR3927_IRQ_END > NR_IRQS #endif -#define irc_dlevel 0 -#define irc_elevel 1 - static unsigned char irc_level[TX3927_NUM_IR] = { 5, 5, 5, 5, 5, 5, /* INT[5:0] */ 7, 7, /* SIO */ @@ -80,34 +77,6 @@ static void unmask_irq_ioc(unsigned int irq) (void)jmr3927_ioc_reg_in(JMR3927_IOC_REV_ADDR); } -static void mask_irq_irc(unsigned int irq) -{ - unsigned int irq_nr = irq - JMR3927_IRQ_IRC; - volatile unsigned long *ilrp = &tx3927_ircptr->ilr[irq_nr / 2]; - if (irq_nr & 1) - *ilrp = (*ilrp & 0x00ff) | (irc_dlevel << 8); - else - *ilrp = (*ilrp & 0xff00) | irc_dlevel; - /* update IRCSR */ - tx3927_ircptr->imr = 0; - tx3927_ircptr->imr = irc_elevel; - /* flush write buffer */ - (void)tx3927_ircptr->ssr; -} - -static void unmask_irq_irc(unsigned int irq) -{ - unsigned int irq_nr = irq - JMR3927_IRQ_IRC; - volatile unsigned long *ilrp = &tx3927_ircptr->ilr[irq_nr / 2]; - if (irq_nr & 1) - *ilrp = (*ilrp & 0x00ff) | (irc_level[irq_nr] << 8); - else - *ilrp = (*ilrp & 0xff00) | irc_level[irq_nr]; - /* update IRCSR */ - tx3927_ircptr->imr = 0; - tx3927_ircptr->imr = irc_elevel; -} - asmlinkage void plat_irq_dispatch(void) { unsigned long cp0_cause = read_c0_cause(); @@ -168,10 +137,6 @@ void __init arch_init_irq(void) /* clear PCI Reset interrupts */ jmr3927_ioc_reg_out(0, JMR3927_IOC_RESET_ADDR); - /* enable interrupt control */ - tx3927_ircptr->cer = TX3927_IRCER_ICE; - tx3927_ircptr->imr = irc_elevel; - jmr3927_irq_init(); /* setup IOC interrupt 1 (PCI, MODEM) */ @@ -193,20 +158,13 @@ static struct irq_chip jmr3927_irq_ioc = { .unmask = unmask_irq_ioc, }; -static struct irq_chip jmr3927_irq_irc = { - .name = "jmr3927_irc", - .ack = mask_irq_irc, - .mask = mask_irq_irc, - .mask_ack = mask_irq_irc, - .unmask = unmask_irq_irc, -}; - static void __init jmr3927_irq_init(void) { u32 i; - for (i = JMR3927_IRQ_IRC; i < JMR3927_IRQ_IRC + JMR3927_NR_IRQ_IRC; i++) - set_irq_chip_and_handler(i, &jmr3927_irq_irc, handle_level_irq); + txx9_irq_init(TX3927_IRC_REG); + for (i = 0; i < TXx9_MAX_IR; i++) + txx9_irq_set_pri(i, irc_level[i]); for (i = JMR3927_IRQ_IOC; i < JMR3927_IRQ_IOC + JMR3927_NR_IRQ_IOC; i++) set_irq_chip_and_handler(i, &jmr3927_irq_ioc, handle_level_irq); } diff --git a/arch/mips/jmr3927/rbhma3100/setup.c b/arch/mips/jmr3927/rbhma3100/setup.c index 8303001516d..fde56e86c2a 100644 --- a/arch/mips/jmr3927/rbhma3100/setup.c +++ b/arch/mips/jmr3927/rbhma3100/setup.c @@ -290,19 +290,6 @@ static void __init tx3927_setup(void) tx3927_ccfgptr->crir, tx3927_ccfgptr->ccfg, tx3927_ccfgptr->pcfg); - /* IRC */ - /* disable interrupt control */ - tx3927_ircptr->cer = 0; - /* mask all IRC interrupts */ - tx3927_ircptr->imr = 0; - for (i = 0; i < TX3927_NUM_IR / 2; i++) { - tx3927_ircptr->ilr[i] = 0; - } - /* setup IRC interrupt mode (Low Active) */ - for (i = 0; i < TX3927_NUM_IR / 8; i++) { - tx3927_ircptr->cr[i] = 0; - } - /* TMR */ /* disable all timers */ for (i = 0; i < TX3927_NR_TMR; i++) { |