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authorLinus Torvalds <torvalds@linux-foundation.org>2010-02-27 16:19:22 -0800
committerLinus Torvalds <torvalds@linux-foundation.org>2010-02-27 16:19:22 -0800
commitf1dd6ad599732fc89f36fdd65a2c2cf3c63a8711 (patch)
tree5092207128e47cba99dc0fe373fff6a36f4cb4b8 /arch/mips/kernel/cevt-gt641xx.c
parent8d37a371b6869920e6c40c495c68eabba1ef3909 (diff)
parente10b234b3c4e255d3300a486c4ac15b43253ac6d (diff)
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (141 commits) MIPS: Alchemy: defconfig updates MIPS: Alchemy: Fix Au1100 ethernet build failure MIPS: Alchemy: Repair db1500/bosporus builds MIPS: ARC: Cleanup unused definitions from sgialib.h MIPS: Cobalt: convert legacy port addresses to GT-64111 bus addresses MIPS: Alchemy: use 36bit addresses for PCMCIA resources. MIPS: Cobalt: Fix theoretical port aliasing issue MIPS: Use ALIGN(x, bytes) instead of __ALIGN_MASK(x, bytes - 1) MIPS: Crazy spinlock speed test. MIPS: Optimize spinlocks. MIPS: Alchemy: devboard PM needs to save CPLD registers. MIPS: PowerTV: Eliminate duplicate opcode definition macros MIPS: Lemote 2F: Move printks out of port_access_lock. MIPS: PNX833x: Convert IRQ controller locks to raw spinlocks. MIPS: Octeon: Replace spinlock with raw_spinlocks in dma-octeon.c. MIPS: Octeon: Replace rwlocks in irq_chip handlers with raw_spinlocks. MIPS: Octeon: Convert octeon_irq_msi_lock to raw spinlock. MIPS: Loongson: Remove pointless sample_lock from oprofile code. MIPS: SNI: Convert sni_rm200_i8259A_lock to raw spinlock. MIPS: i8259: Convert IRQ controller lock to raw spinlock. ...
Diffstat (limited to 'arch/mips/kernel/cevt-gt641xx.c')
-rw-r--r--arch/mips/kernel/cevt-gt641xx.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/mips/kernel/cevt-gt641xx.c b/arch/mips/kernel/cevt-gt641xx.c
index f5d265eb6ea..392ef3756c5 100644
--- a/arch/mips/kernel/cevt-gt641xx.c
+++ b/arch/mips/kernel/cevt-gt641xx.c
@@ -25,7 +25,7 @@
#include <asm/gt64120.h>
#include <asm/time.h>
-static DEFINE_SPINLOCK(gt641xx_timer_lock);
+static DEFINE_RAW_SPINLOCK(gt641xx_timer_lock);
static unsigned int gt641xx_base_clock;
void gt641xx_set_base_clock(unsigned int clock)
@@ -49,7 +49,7 @@ static int gt641xx_timer0_set_next_event(unsigned long delta,
{
u32 ctrl;
- spin_lock(&gt641xx_timer_lock);
+ raw_spin_lock(&gt641xx_timer_lock);
ctrl = GT_READ(GT_TC_CONTROL_OFS);
ctrl &= ~(GT_TC_CONTROL_ENTC0_MSK | GT_TC_CONTROL_SELTC0_MSK);
@@ -58,7 +58,7 @@ static int gt641xx_timer0_set_next_event(unsigned long delta,
GT_WRITE(GT_TC0_OFS, delta);
GT_WRITE(GT_TC_CONTROL_OFS, ctrl);
- spin_unlock(&gt641xx_timer_lock);
+ raw_spin_unlock(&gt641xx_timer_lock);
return 0;
}
@@ -68,7 +68,7 @@ static void gt641xx_timer0_set_mode(enum clock_event_mode mode,
{
u32 ctrl;
- spin_lock(&gt641xx_timer_lock);
+ raw_spin_lock(&gt641xx_timer_lock);
ctrl = GT_READ(GT_TC_CONTROL_OFS);
ctrl &= ~(GT_TC_CONTROL_ENTC0_MSK | GT_TC_CONTROL_SELTC0_MSK);
@@ -86,7 +86,7 @@ static void gt641xx_timer0_set_mode(enum clock_event_mode mode,
GT_WRITE(GT_TC_CONTROL_OFS, ctrl);
- spin_unlock(&gt641xx_timer_lock);
+ raw_spin_unlock(&gt641xx_timer_lock);
}
static void gt641xx_timer0_event_handler(struct clock_event_device *dev)