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authorGrant Likely <grant.likely@secretlab.ca>2009-11-23 14:49:36 -0700
committerGrant Likely <grant.likely@secretlab.ca>2009-11-23 14:49:36 -0700
commit2cfcadde83b308240690ff1c18f117d8bc7a08b0 (patch)
treeaa0795966d070d1f7a5221232d9ba47744bddb5f /arch/mips/kernel/cpu-probe.c
parente91edcf5a2940bb7f1f316c871dfe9e2aaf9d6d9 (diff)
parent648f4e3e50c4793d9dbf9a09afa193631f76fa26 (diff)
Merge commit 'v2.6.32-rc8'
Diffstat (limited to 'arch/mips/kernel/cpu-probe.c')
-rw-r--r--arch/mips/kernel/cpu-probe.c8
1 files changed, 1 insertions, 7 deletions
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index f709657e4dc..7a51866068a 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -23,7 +23,7 @@
#include <asm/mipsregs.h>
#include <asm/system.h>
#include <asm/watch.h>
-
+#include <asm/spram.h>
/*
* Not all of the MIPS CPUs have the "wait" instruction available. Moreover,
* the implementation of the "wait" feature differs between CPU families. This
@@ -711,12 +711,6 @@ static void __cpuinit decode_configs(struct cpuinfo_mips *c)
mips_probe_watch_registers(c);
}
-#ifdef CONFIG_CPU_MIPSR2
-extern void spram_config(void);
-#else
-static inline void spram_config(void) {}
-#endif
-
static inline void cpu_probe_mips(struct cpuinfo_mips *c, unsigned int cpu)
{
decode_configs(c);