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authorDavid S. Miller <davem@davemloft.net>2011-04-11 13:44:25 -0700
committerDavid S. Miller <davem@davemloft.net>2011-04-11 13:44:25 -0700
commit1c01a80cfec6f806246f31ff2680cd3639b30e67 (patch)
tree0b554aad2ec1da71ecf6339d4ba51617bfe1dc3c /arch/mips/kernel/perf_event_mipsxx.c
parentc44d79950b2daa1025e62eede73e4e4a274d1ef3 (diff)
parent4a9f65f6304a00f6473e83b19c1e83caa1e42530 (diff)
Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/davem/net-2.6
Conflicts: drivers/net/smsc911x.c
Diffstat (limited to 'arch/mips/kernel/perf_event_mipsxx.c')
-rw-r--r--arch/mips/kernel/perf_event_mipsxx.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/kernel/perf_event_mipsxx.c b/arch/mips/kernel/perf_event_mipsxx.c
index d9a7db78ed6..75266ff4cc3 100644
--- a/arch/mips/kernel/perf_event_mipsxx.c
+++ b/arch/mips/kernel/perf_event_mipsxx.c
@@ -721,7 +721,7 @@ static void mipsxx_pmu_start(void)
/*
* MIPS performance counters can be per-TC. The control registers can
- * not be directly accessed accross CPUs. Hence if we want to do global
+ * not be directly accessed across CPUs. Hence if we want to do global
* control, we need cross CPU calls. on_each_cpu() can help us, but we
* can not make sure this function is called with interrupts enabled. So
* here we pause local counters and then grab a rwlock and leave the