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authorAtsushi Nemoto <anemo@mba.ocn.ne.jp>2007-03-10 01:03:48 +0900
committerRalf Baechle <ralf@linux-mips.org>2007-03-17 01:03:25 +0000
commitc6a2f4679331206ef5d353fc9a6cda2fa4aef8c6 (patch)
tree9634ba2d5b6c6c97f4301b28088c68254201bf74 /arch/mips/kernel/r4k_fpu.S
parentf1dbf8e718ef0ddb196a28bcc71925ac7da881af (diff)
[MIPS] Check FCSR for pending interrupts, alternative version
Commit 6d6671066a311703bca1b91645bb1e04cc983387 is incomplete and misses non-r4k CPUs. This patch reverts the commit and fixes in other way. o Do FCSR checking in caller of restore_fp_context. o Send SIGFPE if the signal handler set any FPU exception bits. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel/r4k_fpu.S')
-rw-r--r--arch/mips/kernel/r4k_fpu.S16
1 files changed, 0 insertions, 16 deletions
diff --git a/arch/mips/kernel/r4k_fpu.S b/arch/mips/kernel/r4k_fpu.S
index 59c1577ecbb..dbd42adc52e 100644
--- a/arch/mips/kernel/r4k_fpu.S
+++ b/arch/mips/kernel/r4k_fpu.S
@@ -114,14 +114,6 @@ LEAF(_save_fp_context32)
*/
LEAF(_restore_fp_context)
EX lw t0, SC_FPC_CSR(a0)
-
- /* Fail if the CSR has exceptions pending */
- srl t1, t0, 5
- and t1, t0
- andi t1, 0x1f << 7
- bnez t1, fault
- nop
-
#ifdef CONFIG_64BIT
EX ldc1 $f1, SC_FPREGS+8(a0)
EX ldc1 $f3, SC_FPREGS+24(a0)
@@ -165,14 +157,6 @@ LEAF(_restore_fp_context)
LEAF(_restore_fp_context32)
/* Restore an o32 sigcontext. */
EX lw t0, SC32_FPC_CSR(a0)
-
- /* Fail if the CSR has exceptions pending */
- srl t1, t0, 5
- and t1, t0
- andi t1, 0x1f << 7
- bnez t1, fault
- nop
-
EX ldc1 $f0, SC32_FPREGS+0(a0)
EX ldc1 $f2, SC32_FPREGS+16(a0)
EX ldc1 $f4, SC32_FPREGS+32(a0)