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authorPaul Burton <paul.burton@imgtec.com>2014-07-09 12:48:18 +0100
committerRalf Baechle <ralf@linux-mips.org>2014-07-30 20:47:39 +0200
commit064231e548d0ef90453081f424ced7b3ffffffe9 (patch)
tree40d8e21d395d879a0a518ed9222872981b401e73 /arch/mips/kernel
parent250dc03727b9cce91bd86091f05bf2443e2be9ec (diff)
MIPS: pm-cps: Prevent use of mips_cps_* without CPS SMP
These symbols will not be defined when CONFIG_MIPS_CPS=n, but although the CPS_PM_POWER_GATED state will never be used in that case the compiler doesn't have enough information to figure that out. Add checks which evaluate to a constant false for CONFIG_MIPS_CPS=n cases in order to help the compiler out & eliminate the symbol references. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Reviewed-by: Markos Chandras <markos.chandras@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/7278/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel')
-rw-r--r--arch/mips/kernel/pm-cps.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/mips/kernel/pm-cps.c b/arch/mips/kernel/pm-cps.c
index c4c2069d3a2..c409a5aef8a 100644
--- a/arch/mips/kernel/pm-cps.c
+++ b/arch/mips/kernel/pm-cps.c
@@ -149,6 +149,10 @@ int cps_pm_enter_state(enum cps_pm_state state)
/* Setup the VPE to run mips_cps_pm_restore when started again */
if (config_enabled(CONFIG_CPU_PM) && state == CPS_PM_POWER_GATED) {
+ /* Power gating relies upon CPS SMP */
+ if (!mips_cps_smp_in_use())
+ return -EINVAL;
+
core_cfg = &mips_cps_core_bootcfg[core];
vpe_cfg = &core_cfg->vpe_config[current_cpu_data.vpe_id];
vpe_cfg->pc = (unsigned long)mips_cps_pm_restore;
@@ -376,6 +380,10 @@ static void * __init cps_gen_entry_code(unsigned cpu, enum cps_pm_state state)
memset(relocs, 0, sizeof(relocs));
if (config_enabled(CONFIG_CPU_PM) && state == CPS_PM_POWER_GATED) {
+ /* Power gating relies upon CPS SMP */
+ if (!mips_cps_smp_in_use())
+ goto out_err;
+
/*
* Save CPU state. Note the non-standard calling convention
* with the return address placed in v0 to avoid clobbering