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authorIngo Molnar <mingo@elte.hu>2010-01-13 09:58:37 +0100
committerIngo Molnar <mingo@elte.hu>2010-01-13 10:08:50 +0100
commit61405fea92c42d072d9b8bd189689f1502a838af (patch)
tree013ea3e7ed71f4114004d5852d40b6e89e128f76 /arch/mips/loongson/common/irq.c
parent9c443dfdd31eddea6cbe6ee0ca469fbcc4e1dc3b (diff)
parent1703f2c321a8a531c393e137a82602e16c6061cb (diff)
Merge branch 'perf/urgent' into perf/core
Merge reason: queue up dependent patch, update to -rc4 Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/mips/loongson/common/irq.c')
-rw-r--r--arch/mips/loongson/common/irq.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/mips/loongson/common/irq.c b/arch/mips/loongson/common/irq.c
index b32b4a3e513..20e73283197 100644
--- a/arch/mips/loongson/common/irq.c
+++ b/arch/mips/loongson/common/irq.c
@@ -20,21 +20,21 @@ void bonito_irqdispatch(void)
int i;
/* workaround the IO dma problem: let cpu looping to allow DMA finish */
- int_status = BONITO_INTISR;
+ int_status = LOONGSON_INTISR;
if (int_status & (1 << 10)) {
while (int_status & (1 << 10)) {
udelay(1);
- int_status = BONITO_INTISR;
+ int_status = LOONGSON_INTISR;
}
}
/* Get pending sources, masked by current enables */
- int_status = BONITO_INTISR & BONITO_INTEN;
+ int_status = LOONGSON_INTISR & LOONGSON_INTEN;
if (int_status != 0) {
i = __ffs(int_status);
int_status &= ~(1 << i);
- do_IRQ(BONITO_IRQ_BASE + i);
+ do_IRQ(LOONGSON_IRQ_BASE + i);
}
}
@@ -60,13 +60,13 @@ void __init arch_init_irq(void)
set_irq_trigger_mode();
/* no steer */
- BONITO_INTSTEER = 0;
+ LOONGSON_INTSTEER = 0;
/*
* Mask out all interrupt by writing "1" to all bit position in
* the interrupt reset reg.
*/
- BONITO_INTENCLR = ~0;
+ LOONGSON_INTENCLR = ~0;
/* machine specific irq init */
mach_init_irq();