diff options
| author | Atsushi Nemoto <anemo@mba.ocn.ne.jp> | 2007-07-13 23:02:29 +0900 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2007-07-13 17:40:00 +0100 |
| commit | e70dfc10b99ebffa1f464b1b9290df2589284f70 (patch) | |
| tree | cf781d6ee4bc032ea7ac24a2b8eb53de33d9cb18 /arch/mips/math-emu/cp1emu.c | |
| parent | e50e1c744df20e704441a99eef7c6414e6920712 (diff) | |
[MIPS] math-emu minor cleanup
Declaring emulpc and contpc as "unsigned long" can get rid of some casts.
This also get rid of some sparse warnings.
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/math-emu/cp1emu.c')
| -rw-r--r-- | arch/mips/math-emu/cp1emu.c | 19 |
1 files changed, 9 insertions, 10 deletions
diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c index d7f05b0abe1..17419e11eca 100644 --- a/arch/mips/math-emu/cp1emu.c +++ b/arch/mips/math-emu/cp1emu.c @@ -205,7 +205,7 @@ static int isBranchInstr(mips_instruction * i) static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_struct *ctx) { mips_instruction ir; - void * emulpc, *contpc; + unsigned long emulpc, contpc; unsigned int cond; if (get_user(ir, (mips_instruction __user *) xcp->cp0_epc)) { @@ -230,7 +230,7 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_struct *ctx) * Linux MIPS branch emulator operates on context, updating the * cp0_epc. */ - emulpc = (void *) (xcp->cp0_epc + 4); /* Snapshot emulation target */ + emulpc = xcp->cp0_epc + 4; /* Snapshot emulation target */ if (__compute_return_epc(xcp)) { #ifdef CP1DBG @@ -244,12 +244,12 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_struct *ctx) return SIGBUS; } /* __compute_return_epc() will have updated cp0_epc */ - contpc = (void *) xcp->cp0_epc; + contpc = xcp->cp0_epc; /* In order not to confuse ptrace() et al, tweak context */ - xcp->cp0_epc = (unsigned long) emulpc - 4; + xcp->cp0_epc = emulpc - 4; } else { - emulpc = (void *) xcp->cp0_epc; - contpc = (void *) (xcp->cp0_epc + 4); + emulpc = xcp->cp0_epc; + contpc = xcp->cp0_epc + 4; } emul: @@ -427,8 +427,7 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_struct *ctx) * instruction */ xcp->cp0_epc += 4; - contpc = (void *) - (xcp->cp0_epc + + contpc = (xcp->cp0_epc + (MIPSInst_SIMM(ir) << 2)); if (get_user(ir, @@ -462,7 +461,7 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_struct *ctx) * Single step the non-cp1 * instruction in the dslot */ - return mips_dsemul(xcp, ir, (unsigned long) contpc); + return mips_dsemul(xcp, ir, contpc); } else { /* branch not taken */ @@ -521,7 +520,7 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_struct *ctx) } /* we did it !! */ - xcp->cp0_epc = (unsigned long) contpc; + xcp->cp0_epc = contpc; xcp->cp0_cause &= ~CAUSEF_BD; return 0; |