diff options
author | Dmitry Torokhov <dtor@insightbb.com> | 2007-05-01 00:24:54 -0400 |
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committer | Dmitry Torokhov <dtor@insightbb.com> | 2007-05-01 00:24:54 -0400 |
commit | bc95f3669f5e6f63cf0b84fe4922c3c6dd4aa775 (patch) | |
tree | 427fcf2a7287c16d4b5aa6cbf494d59579a6a8b1 /arch/mips/mips-boards/malta/malta_smtc.c | |
parent | 3d29cdff999c37b3876082278a8134a0642a02cd (diff) | |
parent | dc87c3985e9b442c60994308a96f887579addc39 (diff) |
Merge master.kernel.org:/pub/scm/linux/kernel/git/torvalds/linux-2.6
Conflicts:
drivers/usb/input/Makefile
drivers/usb/input/gtco.c
Diffstat (limited to 'arch/mips/mips-boards/malta/malta_smtc.c')
-rw-r--r-- | arch/mips/mips-boards/malta/malta_smtc.c | 88 |
1 files changed, 88 insertions, 0 deletions
diff --git a/arch/mips/mips-boards/malta/malta_smtc.c b/arch/mips/mips-boards/malta/malta_smtc.c new file mode 100644 index 00000000000..d1c80f63110 --- /dev/null +++ b/arch/mips/mips-boards/malta/malta_smtc.c @@ -0,0 +1,88 @@ +/* + * Malta Platform-specific hooks for SMP operation + */ +#include <linux/init.h> + +#include <asm/mipsregs.h> +#include <asm/mipsmtregs.h> +#include <asm/smtc.h> +#include <asm/smtc_ipi.h> + +/* VPE/SMP Prototype implements platform interfaces directly */ + +/* + * Cause the specified action to be performed on a targeted "CPU" + */ + +void core_send_ipi(int cpu, unsigned int action) +{ + /* "CPU" may be TC of same VPE, VPE of same CPU, or different CPU */ + smtc_send_ipi(cpu, LINUX_SMP_IPI, action); +} + +/* + * Platform "CPU" startup hook + */ + +void prom_boot_secondary(int cpu, struct task_struct *idle) +{ + smtc_boot_secondary(cpu, idle); +} + +/* + * Post-config but pre-boot cleanup entry point + */ + +void prom_init_secondary(void) +{ + void smtc_init_secondary(void); + int myvpe; + + /* Don't enable Malta I/O interrupts (IP2) for secondary VPEs */ + myvpe = read_c0_tcbind() & TCBIND_CURVPE; + if (myvpe != 0) { + /* Ideally, this should be done only once per VPE, but... */ + clear_c0_status(STATUSF_IP2); + set_c0_status(STATUSF_IP0 | STATUSF_IP1 | STATUSF_IP3 + | STATUSF_IP4 | STATUSF_IP5 | STATUSF_IP6 + | STATUSF_IP7); + } + + smtc_init_secondary(); +} + +/* + * Platform SMP pre-initialization + * + * As noted above, we can assume a single CPU for now + * but it may be multithreaded. + */ + +void plat_smp_setup(void) +{ + if (read_c0_config3() & (1<<2)) + mipsmt_build_cpu_map(0); +} + +void __init plat_prepare_cpus(unsigned int max_cpus) +{ + if (read_c0_config3() & (1<<2)) + mipsmt_prepare_cpus(); +} + +/* + * SMP initialization finalization entry point + */ + +void prom_smp_finish(void) +{ + smtc_smp_finish(); +} + +/* + * Hook for after all CPUs are online + */ + +void prom_cpus_done(void) +{ +} |