diff options
| author | Ralf Baechle <ralf@linux-mips.org> | 2007-10-11 23:46:09 +0100 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2007-10-11 23:46:09 +0100 |
| commit | ea5804015c0ce67741eb4b156a071fb4f415345f (patch) | |
| tree | bc4da66c0d9a531a17159b1cb001ad8e96d24487 /arch/mips/mips-boards | |
| parent | 7bcf7717b6a047c272410d0cd00213185fe6b99d (diff) | |
[MIPS] Dyntick support for SMTC:
The kernel currently only supports broadcasting of the timer interrupt
from a single timer, not multicasting into two multicast groups of
processors. So the implemented mechanism for SMTC works by broadcasting
the cp0 compare interrupt on VPE 0 and ignoring it on any additional VPEs.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/mips-boards')
| -rw-r--r-- | arch/mips/mips-boards/generic/time.c | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/arch/mips/mips-boards/generic/time.c b/arch/mips/mips-boards/generic/time.c index 2c8db3e0f4b..cf55ecd96bf 100644 --- a/arch/mips/mips-boards/generic/time.c +++ b/arch/mips/mips-boards/generic/time.c @@ -55,7 +55,6 @@ unsigned long cpu_khz; static int mips_cpu_timer_irq; extern int cp0_perfcount_irq; -extern void smtc_timer_broadcast(void); static void mips_timer_dispatch(void) { |