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author | Linus Torvalds <torvalds@linux-foundation.org> | 2012-08-25 11:45:04 -0700 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2012-08-25 11:45:04 -0700 |
commit | 2432cbe4f29fbb8d349e481695ac6e88b884bacb (patch) | |
tree | 80079d639d2937d44b201a812e742fdc030376c1 /arch/mips/mti-malta/malta-pci.c | |
parent | 8497ae61d0e7f30ae9f20c5fcea94c957b6c3b83 (diff) | |
parent | a1dca315ce3f78347bca8ce8befe3cc71ae63b7e (diff) |
Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
Pull MIPS fixes from Ralf Baechle:
"Random fixes across the MIPS tree. The two hotspots are several bugs
in the module loader and the ath79 SOC support; also noteworthy is the
restructuring of the code to synchronize CPU timers across CPUs on
startup; the old code recently ceased to work due to unrelated
changes.
All except one of these patches have sat for a significant time in
linux-next for testing."
* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus:
MIPS: pci-ar724x: avoid data bus error due to a missing PCIe module
MIPS: Malta: Delete duplicate PCI fixup.
MIPS: ath79: don't hardcode the unavailability of the DSP ASE
MIPS: Synchronize MIPS count one CPU at a time
MIPS: BCM63xx: Fix SPI message control register handling for BCM6338/6348.
MIPS: Module: Deal with malformed HI16/LO16 relocation sequences.
MIPS: Fix race condition in module relocation code.
MIPS: Fix memory leak in error path of HI16/LO16 relocation handling.
MIPS: MTX-1: Add udelay to mtx1_pci_idsel
MIPS: ath79: select HAVE_CLK
MIPS: ath79: Use correct IRQ number for the OHCI controller on AR7240
MIPS: ath79: Fix number of GPIO lines for AR724[12]
MIPS: Octeon: Fix broken interrupt controller code.
Diffstat (limited to 'arch/mips/mti-malta/malta-pci.c')
-rw-r--r-- | arch/mips/mti-malta/malta-pci.c | 13 |
1 files changed, 0 insertions, 13 deletions
diff --git a/arch/mips/mti-malta/malta-pci.c b/arch/mips/mti-malta/malta-pci.c index 284dea54faf..2147cb34e70 100644 --- a/arch/mips/mti-malta/malta-pci.c +++ b/arch/mips/mti-malta/malta-pci.c @@ -252,16 +252,3 @@ void __init mips_pcibios_init(void) register_pci_controller(controller); } - -/* Enable PCI 2.1 compatibility in PIIX4 */ -static void __devinit quirk_dlcsetup(struct pci_dev *dev) -{ - u8 odlc, ndlc; - (void) pci_read_config_byte(dev, 0x82, &odlc); - /* Enable passive releases and delayed transaction */ - ndlc = odlc | 7; - (void) pci_write_config_byte(dev, 0x82, ndlc); -} - -DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_0, - quirk_dlcsetup); |