diff options
| author | Dmitry Torokhov <dtor_core@ameritech.net> | 2006-03-13 23:36:52 -0500 |
|---|---|---|
| committer | Dmitry Torokhov <dtor_core@ameritech.net> | 2006-03-13 23:36:52 -0500 |
| commit | 58a343f22e8ef987b90e34bbef7f1455e3bb5a15 (patch) | |
| tree | fc811fb570639f2083df6d9191b6a8d7cff65352 /arch/mips/sibyte | |
| parent | 51c38f9bce274a1e8a90aa457fb433be738f7458 (diff) | |
| parent | 3759fa9c55923f719ae944a3f8fbb029b36f759d (diff) | |
Merge rsync://rsync.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
Diffstat (limited to 'arch/mips/sibyte')
| -rw-r--r-- | arch/mips/sibyte/Kconfig | 4 | ||||
| -rw-r--r-- | arch/mips/sibyte/bcm1480/irq.c | 5 | ||||
| -rw-r--r-- | arch/mips/sibyte/cfe/smp.c | 10 |
3 files changed, 11 insertions, 8 deletions
diff --git a/arch/mips/sibyte/Kconfig b/arch/mips/sibyte/Kconfig index de46f62ac46..816aee7fcd2 100644 --- a/arch/mips/sibyte/Kconfig +++ b/arch/mips/sibyte/Kconfig @@ -102,11 +102,11 @@ config SIMULATION Build a kernel suitable for running under the GDB simulator. Primarily adjusts the kernel's notion of time. -config CONFIG_SB1_CEX_ALWAYS_FATAL +config SB1_CEX_ALWAYS_FATAL bool "All cache exceptions considered fatal (no recovery attempted)" depends on SIBYTE_SB1xxx_SOC -config CONFIG_SB1_CERR_STALL +config SB1_CERR_STALL bool "Stall (rather than panic) on fatal cache error" depends on SIBYTE_SB1xxx_SOC diff --git a/arch/mips/sibyte/bcm1480/irq.c b/arch/mips/sibyte/bcm1480/irq.c index b2a1ba5d23d..9cf7d713b13 100644 --- a/arch/mips/sibyte/bcm1480/irq.c +++ b/arch/mips/sibyte/bcm1480/irq.c @@ -139,7 +139,7 @@ void bcm1480_unmask_irq(int cpu, int irq) #ifdef CONFIG_SMP static void bcm1480_set_affinity(unsigned int irq, cpumask_t mask) { - int i = 0, old_cpu, cpu, int_on; + int i = 0, old_cpu, cpu, int_on, k; u64 cur_ints; irq_desc_t *desc = irq_desc + irq; unsigned long flags; @@ -165,7 +165,6 @@ static void bcm1480_set_affinity(unsigned int irq, cpumask_t mask) irq_dirty -= BCM1480_NR_IRQS_HALF; } - int k; for (k=0; k<2; k++) { /* Loop through high and low interrupt mask register */ cur_ints = ____raw_readq(IOADDR(A_BCM1480_IMR_MAPPER(old_cpu) + R_BCM1480_IMR_INTERRUPT_MASK_H + (k*BCM1480_IMR_HL_SPACING))); int_on = !(cur_ints & (((u64) 1) << irq_dirty)); @@ -216,6 +215,7 @@ static void ack_bcm1480_irq(unsigned int irq) { u64 pending; unsigned int irq_dirty; + int k; /* * If the interrupt was an HT interrupt, now is the time to @@ -227,7 +227,6 @@ static void ack_bcm1480_irq(unsigned int irq) if ((irq_dirty >= BCM1480_NR_IRQS_HALF) && (irq_dirty <= BCM1480_NR_IRQS)) { irq_dirty -= BCM1480_NR_IRQS_HALF; } - int k; for (k=0; k<2; k++) { /* Loop through high and low LDT interrupts */ pending = __raw_readq(IOADDR(A_BCM1480_IMR_REGISTER(bcm1480_irq_owner[irq], R_BCM1480_IMR_LDT_INTERRUPT_H + (k*BCM1480_IMR_HL_SPACING)))); diff --git a/arch/mips/sibyte/cfe/smp.c b/arch/mips/sibyte/cfe/smp.c index 4477af3d807..eab20e2db32 100644 --- a/arch/mips/sibyte/cfe/smp.c +++ b/arch/mips/sibyte/cfe/smp.c @@ -31,7 +31,7 @@ * * Common setup before any secondaries are started */ -void __init prom_prepare_cpus(unsigned int max_cpus) +void __init plat_smp_setup(void) { int i, num; @@ -40,14 +40,18 @@ void __init prom_prepare_cpus(unsigned int max_cpus) __cpu_number_map[0] = 0; __cpu_logical_map[0] = 0; - for (i=1, num=0; i<NR_CPUS; i++) { + for (i = 1, num = 0; i < NR_CPUS; i++) { if (cfe_cpu_stop(i) == 0) { cpu_set(i, phys_cpu_present_map); __cpu_number_map[i] = ++num; __cpu_logical_map[num] = i; } } - printk("Detected %i available secondary CPU(s)\n", num); + printk(KERN_INFO "Detected %i available secondary CPU(s)\n", num); +} + +void __init plat_prepare_cpus(unsigned int max_cpus) +{ } /* |