[MIPS] Rewrite all the assembler interrupt handlers to C.

Saves like 1,600 lines of code, is way easier to debug, compilers
frequently do a better job than the cut and paste type of handlers many
boards had.  And finally having all the stuff done in a single place
also means alot of bug potencial for the MT ASE is gone.

The only surviving handler in assembler is the DECstation one; I hope
Maciej will rewrite it.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

3 files changed, 19 insertions, 88 deletions

diff --git a/arch/mips/tx4938/common/Makefile b/arch/mips/tx4938/common/Makefile
index 74c95c5bcdb..2033ae77f63 100644
--- a/arch/mips/tx4938/common/Makefile
+++ b/arch/mips/tx4938/common/Makefile
@@ -6,6 +6,6 @@
 # unless it's something special (ie not a .c file).
 #
 
-obj-y	+= prom.o setup.o irq.o irq_handler.o rtc_rx5c348.o
+obj-y	+= prom.o setup.o irq.o rtc_rx5c348.o
 obj-$(CONFIG_KGDB) += dbgio.o
 
diff --git a/arch/mips/tx4938/common/irq.c b/arch/mips/tx4938/common/irq.c
index 4f90d7faf63..873805178d8 100644
--- a/arch/mips/tx4938/common/irq.c
+++ b/arch/mips/tx4938/common/irq.c
@@ -392,11 +392,8 @@ tx4938_irq_pic_end(unsigned int irq)
 void __init
 tx4938_irq_init(void)
 {
-	extern asmlinkage void tx4938_irq_handler(void);
-
 	tx4938_irq_cp0_init();
 	tx4938_irq_pic_init();
-	set_except_vector(0, tx4938_irq_handler);
 
 	return;
 }
@@ -422,3 +419,21 @@ tx4938_irq_nested(void)
 	wbflush();
 	return (sw_irq);
 }
+
+asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
+{
+	unsigned int pending = read_c0_cause() & read_c0_status();
+
+	if (pending & STATUSF_IP7)
+		do_IRQ(TX4938_IRQ_CPU_TIMER, regs);
+	else if (pending & STATUSF_IP2) {
+		int irq = tx4938_irq_nested();
+		if (irq)
+			do_IRQ(irq, regs);
+		else
+			spurious_interrupt(regs);
+	} else if (pending & STATUSF_IP1)
+		do_IRQ(TX4938_IRQ_USER1, regs);
+	else if (pending & STATUSF_IP0)
+		do_IRQ(TX4938_IRQ_USER0, regs);
+}
diff --git a/arch/mips/tx4938/common/irq_handler.S b/arch/mips/tx4938/common/irq_handler.S
deleted file mode 100644
index 1b2f72bac42..00000000000
--- a/arch/mips/tx4938/common/irq_handler.S
+++ /dev/null
@@ -1,84 +0,0 @@
-/*
- * linux/arch/mips/tx4938/common/handler.S
- *
- * Primary interrupt handler for tx4938 based systems
- * Copyright (C) 2000-2001 Toshiba Corporation
- *
- * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
- * terms of the GNU General Public License version 2. This program is
- * licensed "as is" without any warranty of any kind, whether express
- * or implied.
- *
- * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
- */
-#include <asm/asm.h>
-#include <asm/mipsregs.h>
-#include <asm/addrspace.h>
-#include <asm/regdef.h>
-#include <asm/stackframe.h>
-#include <asm/tx4938/rbtx4938.h>
-
-
-		.align	5
-		NESTED(tx4938_irq_handler, PT_SIZE, sp)
-		SAVE_ALL
-		CLI
-		.set	at
-
-		mfc0	t0, CP0_CAUSE
-		mfc0	t1, CP0_STATUS
-		and	t0, t1
-
-		andi	t1, t0, STATUSF_IP7	/* cpu timer */
-		bnez	t1, ll_ip7
-
-		/* IP6..IP3 multiplexed -- do not use */
-
-		andi	t1, t0, STATUSF_IP2	/* tx4938 pic */
-		bnez	t1, ll_ip2
-
-		andi	t1, t0, STATUSF_IP1	/* user line 1 */
-		bnez	t1, ll_ip1
-
-		andi	t1, t0, STATUSF_IP0	/* user line 0 */
-		bnez	t1, ll_ip0
-
-		.set	reorder
-
-		nop
-		END(tx4938_irq_handler)
-
-		.align	5
-
-
-ll_ip7:
-		li	a0, TX4938_IRQ_CPU_TIMER
-		move	a1, sp
-		jal	do_IRQ
-		j	ret_from_irq
-
-
-ll_ip2:
-		jal	tx4938_irq_nested
-		nop
-		beqz	v0, goto_spurious_interrupt
-		nop
-		move	a0, v0
-		move	a1, sp
-		jal	do_IRQ
-		j	ret_from_irq
-
-goto_spurious_interrupt:
-		j	ret_from_irq
-
-ll_ip1:
-		li	a0, TX4938_IRQ_USER1
-		move	a1, sp
-		jal	do_IRQ
-		j	ret_from_irq
-
-ll_ip0:
-		li	a0, TX4938_IRQ_USER0
-		move	a1, sp
-		jal	do_IRQ
-		j	ret_from_irq