diff options
| author | Atsushi Nemoto <anemo@mba.ocn.ne.jp> | 2008-09-01 22:22:37 +0900 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2008-10-11 16:18:47 +0100 |
| commit | 21e77df215e58523a755b5dd006cb17610616f20 (patch) | |
| tree | 94895b0fdc98e5f6ac44ba667feb96a9433a7065 /arch/mips/txx9/rbtx4927 | |
| parent | f6d9831bb11eb465f95fb1736b866d405d9c7cbf (diff) | |
MIPS: TXx9: Microoptimize interrupt handlers
The IOC interrupt status register on RBTX49XX only have 8 bits. Use
8-bit version of __fls() to optimize interrupt handlers.
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/txx9/rbtx4927')
| -rw-r--r-- | arch/mips/txx9/rbtx4927/irq.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/mips/txx9/rbtx4927/irq.c b/arch/mips/txx9/rbtx4927/irq.c index 22076e3f03a..9c14ebb26cb 100644 --- a/arch/mips/txx9/rbtx4927/irq.c +++ b/arch/mips/txx9/rbtx4927/irq.c @@ -133,9 +133,9 @@ static int toshiba_rbtx4927_irq_nested(int sw_irq) u8 level3; level3 = readb(rbtx4927_imstat_addr) & 0x1f; - if (level3) - sw_irq = RBTX4927_IRQ_IOC + fls(level3) - 1; - return sw_irq; + if (unlikely(!level3)) + return -1; + return RBTX4927_IRQ_IOC + __fls8(level3); } static void __init toshiba_rbtx4927_irq_ioc_init(void) |