diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2013-03-02 07:44:16 -0800 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2013-03-02 07:44:16 -0800 |
commit | aebb2afd5420c860b7fbc3882a323ef1247fbf16 (patch) | |
tree | 05ee0efcebca5ec421de44de7a6d6271088c64a8 /arch/mips/txx9 | |
parent | 8eae508b7c6ff502a71d0293b69e97c5505d5840 (diff) | |
parent | edb15d83a875a1f4b1576188844db5c330c3267d (diff) |
Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
Pull MIPS updates from Ralf Baechle:
o Add basic support for the Mediatek/Ralink Wireless SoC family.
o The Qualcomm Atheros platform is extended by support for the new
QCA955X SoC series as well as a bunch of patches that get the code
ready for OF support.
o Lantiq and BCM47XX platform have a few improvements and bug fixes.
o MIPS has sent a few patches that get the kernel ready for the
upcoming microMIPS support.
o The rest of the series is made up of small bug fixes and cleanups
that relate to various parts of the MIPS code. The biggy in there is
a whitespace cleanup. After I was sent another set of whitespace
cleanup patches I decided it was the time to clean the whitespace
"issues" for once and and that touches many files below arch/mips/.
Fix up silly conflicts, mostly due to whitespace cleanups.
* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (105 commits)
MIPS: Quit exporting kernel internel break codes to uapi/asm/break.h
MIPS: remove broken conditional inside vpe loader code
MIPS: SMTC: fix implicit declaration of set_vi_handler
MIPS: early_printk: drop __init annotations
MIPS: Probe for and report hardware virtualization support.
MIPS: ath79: add support for the Qualcomm Atheros AP136-010 board
MIPS: ath79: add USB controller registration code for the QCA955X SoCs
MIPS: ath79: add PCI controller registration code for the QCA955X SoCs
MIPS: ath79: add WMAC registration code for the QCA955X SoCs
MIPS: ath79: register UART for the QCA955X SoCs
MIPS: ath79: add QCA955X specific glue to ath79_device_reset_{set, clear}
MIPS: ath79: add GPIO setup code for the QCA955X SoCs
MIPS: ath79: add IRQ handling code for the QCA955X SoCs
MIPS: ath79: add clock setup code for the QCA955X SoCs
MIPS: ath79: add SoC detection code for the QCA955X SoCs
MIPS: ath79: add early printk support for the QCA955X SoCs
MIPS: ath79: fix WMAC IRQ resource assignment
mips: reserve elfcorehdr
mips: Make sure kernel memory is in iomem
MIPS: ath79: use dynamically allocated USB platform devices
...
Diffstat (limited to 'arch/mips/txx9')
-rw-r--r-- | arch/mips/txx9/Platform | 4 | ||||
-rw-r--r-- | arch/mips/txx9/generic/irq_tx4927.c | 2 | ||||
-rw-r--r-- | arch/mips/txx9/generic/irq_tx4939.c | 4 | ||||
-rw-r--r-- | arch/mips/txx9/generic/mem_tx4927.c | 2 | ||||
-rw-r--r-- | arch/mips/txx9/generic/pci.c | 4 | ||||
-rw-r--r-- | arch/mips/txx9/generic/setup.c | 8 | ||||
-rw-r--r-- | arch/mips/txx9/generic/setup_tx3927.c | 2 | ||||
-rw-r--r-- | arch/mips/txx9/generic/setup_tx4927.c | 2 | ||||
-rw-r--r-- | arch/mips/txx9/generic/setup_tx4938.c | 2 | ||||
-rw-r--r-- | arch/mips/txx9/generic/setup_tx4939.c | 4 | ||||
-rw-r--r-- | arch/mips/txx9/generic/smsc_fdc37m81x.c | 48 | ||||
-rw-r--r-- | arch/mips/txx9/rbtx4927/irq.c | 2 | ||||
-rw-r--r-- | arch/mips/txx9/rbtx4927/prom.c | 2 | ||||
-rw-r--r-- | arch/mips/txx9/rbtx4927/setup.c | 2 | ||||
-rw-r--r-- | arch/mips/txx9/rbtx4938/setup.c | 8 | ||||
-rw-r--r-- | arch/mips/txx9/rbtx4939/setup.c | 4 |
16 files changed, 50 insertions, 50 deletions
diff --git a/arch/mips/txx9/Platform b/arch/mips/txx9/Platform index a801abbe138..a176d1fd579 100644 --- a/arch/mips/txx9/Platform +++ b/arch/mips/txx9/Platform @@ -6,5 +6,5 @@ cflags-$(CONFIG_MACH_TX39XX) += \ cflags-$(CONFIG_MACH_TX49XX) += \ -I$(srctree)/arch/mips/include/asm/mach-tx49xx -load-$(CONFIG_MACH_TX39XX) += 0xffffffff80050000 -load-$(CONFIG_MACH_TX49XX) += 0xffffffff80100000 +load-$(CONFIG_MACH_TX39XX) += 0xffffffff80050000 +load-$(CONFIG_MACH_TX49XX) += 0xffffffff80100000 diff --git a/arch/mips/txx9/generic/irq_tx4927.c b/arch/mips/txx9/generic/irq_tx4927.c index 7e3ac5782da..ed8e702d448 100644 --- a/arch/mips/txx9/generic/irq_tx4927.c +++ b/arch/mips/txx9/generic/irq_tx4927.c @@ -2,7 +2,7 @@ * Common tx4927 irq handler * * Author: MontaVista Software, Inc. - * source@mvista.com + * source@mvista.com * * under the terms of the GNU General Public License as published by the * Free Software Foundation; either version 2 of the License, or (at your diff --git a/arch/mips/txx9/generic/irq_tx4939.c b/arch/mips/txx9/generic/irq_tx4939.c index 6b067dbd2ae..0d7267e81a8 100644 --- a/arch/mips/txx9/generic/irq_tx4939.c +++ b/arch/mips/txx9/generic/irq_tx4939.c @@ -5,8 +5,8 @@ * * Copyright 2001, 2003-2005 MontaVista Software Inc. * Author: MontaVista Software, Inc. - * ahennessy@mvista.com - * source@mvista.com + * ahennessy@mvista.com + * source@mvista.com * Copyright (C) 2000-2001,2005-2007 Toshiba Corporation * * This file is subject to the terms and conditions of the GNU General Public diff --git a/arch/mips/txx9/generic/mem_tx4927.c b/arch/mips/txx9/generic/mem_tx4927.c index 70f9626f822..deea2ceae8a 100644 --- a/arch/mips/txx9/generic/mem_tx4927.c +++ b/arch/mips/txx9/generic/mem_tx4927.c @@ -2,7 +2,7 @@ * common tx4927 memory interface * * Author: MontaVista Software, Inc. - * source@mvista.com + * source@mvista.com * * Copyright 2001-2002 MontaVista Software Inc. * diff --git a/arch/mips/txx9/generic/pci.c b/arch/mips/txx9/generic/pci.c index ce8f8b9b930..28713274e0c 100644 --- a/arch/mips/txx9/generic/pci.c +++ b/arch/mips/txx9/generic/pci.c @@ -2,7 +2,7 @@ * linux/arch/mips/txx9/pci.c * * Based on linux/arch/mips/txx9/rbtx4927/setup.c, - * linux/arch/mips/txx9/rbtx4938/setup.c, + * linux/arch/mips/txx9/rbtx4938/setup.c, * and RBTX49xx patch from CELF patch archive. * * Copyright 2001-2005 MontaVista Software Inc. @@ -107,7 +107,7 @@ int txx9_pci_mem_high __initdata; /* * allocate pci_controller and resources. - * mem_base, io_base: physical address. 0 for auto assignment. + * mem_base, io_base: physical address. 0 for auto assignment. * mem_size and io_size means max size on auto assignment. * pcic must be &txx9_primary_pcic or NULL. */ diff --git a/arch/mips/txx9/generic/setup.c b/arch/mips/txx9/generic/setup.c index 560fe899175..5524f2c7b05 100644 --- a/arch/mips/txx9/generic/setup.c +++ b/arch/mips/txx9/generic/setup.c @@ -513,19 +513,19 @@ void __init txx9_sio_init(unsigned long baseaddr, int irq, } #ifdef CONFIG_EARLY_PRINTK -static void __init null_prom_putchar(char c) +static void null_prom_putchar(char c) { } -void (*txx9_prom_putchar)(char c) __initdata = null_prom_putchar; +void (*txx9_prom_putchar)(char c) = null_prom_putchar; -void __init prom_putchar(char c) +void prom_putchar(char c) { txx9_prom_putchar(c); } static void __iomem *early_txx9_sio_port; -static void __init early_txx9_sio_putchar(char c) +static void early_txx9_sio_putchar(char c) { #define TXX9_SICISR 0x0c #define TXX9_SITFIFO 0x1c diff --git a/arch/mips/txx9/generic/setup_tx3927.c b/arch/mips/txx9/generic/setup_tx3927.c index 9505d58454c..110e05c3eb8 100644 --- a/arch/mips/txx9/generic/setup_tx3927.c +++ b/arch/mips/txx9/generic/setup_tx3927.c @@ -132,6 +132,6 @@ void __init tx3927_mtd_init(int ch) unsigned long size = txx9_ce_res[ch].end - start + 1; if (!(tx3927_romcptr->cr[ch] & 0x8)) - return; /* disabled */ + return; /* disabled */ txx9_physmap_flash_init(ch, start, size, &pdata); } diff --git a/arch/mips/txx9/generic/setup_tx4927.c b/arch/mips/txx9/generic/setup_tx4927.c index 3418b2a90f7..e714d6ce9a8 100644 --- a/arch/mips/txx9/generic/setup_tx4927.c +++ b/arch/mips/txx9/generic/setup_tx4927.c @@ -250,7 +250,7 @@ void __init tx4927_mtd_init(int ch) unsigned long size = txx9_ce_res[ch].end - start + 1; if (!(TX4927_EBUSC_CR(ch) & 0x8)) - return; /* disabled */ + return; /* disabled */ txx9_physmap_flash_init(ch, start, size, &pdata); } diff --git a/arch/mips/txx9/generic/setup_tx4938.c b/arch/mips/txx9/generic/setup_tx4938.c index eb208011023..0a3bf2dfaba 100644 --- a/arch/mips/txx9/generic/setup_tx4938.c +++ b/arch/mips/txx9/generic/setup_tx4938.c @@ -329,7 +329,7 @@ void __init tx4938_mtd_init(int ch) unsigned long size = txx9_ce_res[ch].end - start + 1; if (!(TX4938_EBUSC_CR(ch) & 0x8)) - return; /* disabled */ + return; /* disabled */ txx9_physmap_flash_init(ch, start, size, &pdata); } diff --git a/arch/mips/txx9/generic/setup_tx4939.c b/arch/mips/txx9/generic/setup_tx4939.c index 5ff7a9584da..729a5099178 100644 --- a/arch/mips/txx9/generic/setup_tx4939.c +++ b/arch/mips/txx9/generic/setup_tx4939.c @@ -301,7 +301,7 @@ void __init tx4939_sio_init(unsigned int sclk, unsigned int cts_mask) unsigned int ch_mask = 0; __u64 pcfg = __raw_readq(&tx4939_ccfgptr->pcfg); - cts_mask |= ~1; /* only SIO0 have RTS/CTS */ + cts_mask |= ~1; /* only SIO0 have RTS/CTS */ if ((pcfg & TX4939_PCFG_SIO2MODE_MASK) != TX4939_PCFG_SIO2MODE_SIO0) cts_mask |= 1 << 0; /* disable SIO0 RTS/CTS by PCFG setting */ if ((pcfg & TX4939_PCFG_SIO2MODE_MASK) != TX4939_PCFG_SIO2MODE_SIO2) @@ -378,7 +378,7 @@ void __init tx4939_mtd_init(int ch) unsigned long size = txx9_ce_res[ch].end - start + 1; if (!(TX4939_EBUSC_CR(ch) & 0x8)) - return; /* disabled */ + return; /* disabled */ txx9_physmap_flash_init(ch, start, size, &pdata); } diff --git a/arch/mips/txx9/generic/smsc_fdc37m81x.c b/arch/mips/txx9/generic/smsc_fdc37m81x.c index 8ebc3848f3a..f98baa6263d 100644 --- a/arch/mips/txx9/generic/smsc_fdc37m81x.c +++ b/arch/mips/txx9/generic/smsc_fdc37m81x.c @@ -18,40 +18,40 @@ /* Common Registers */ #define SMSC_FDC37M81X_CONFIG_INDEX 0x00 #define SMSC_FDC37M81X_CONFIG_DATA 0x01 -#define SMSC_FDC37M81X_CONF 0x02 -#define SMSC_FDC37M81X_INDEX 0x03 -#define SMSC_FDC37M81X_DNUM 0x07 -#define SMSC_FDC37M81X_DID 0x20 -#define SMSC_FDC37M81X_DREV 0x21 -#define SMSC_FDC37M81X_PCNT 0x22 -#define SMSC_FDC37M81X_PMGT 0x23 -#define SMSC_FDC37M81X_OSC 0x24 -#define SMSC_FDC37M81X_CONFPA0 0x26 -#define SMSC_FDC37M81X_CONFPA1 0x27 -#define SMSC_FDC37M81X_TEST4 0x2B -#define SMSC_FDC37M81X_TEST5 0x2C -#define SMSC_FDC37M81X_TEST1 0x2D -#define SMSC_FDC37M81X_TEST2 0x2E -#define SMSC_FDC37M81X_TEST3 0x2F +#define SMSC_FDC37M81X_CONF 0x02 +#define SMSC_FDC37M81X_INDEX 0x03 +#define SMSC_FDC37M81X_DNUM 0x07 +#define SMSC_FDC37M81X_DID 0x20 +#define SMSC_FDC37M81X_DREV 0x21 +#define SMSC_FDC37M81X_PCNT 0x22 +#define SMSC_FDC37M81X_PMGT 0x23 +#define SMSC_FDC37M81X_OSC 0x24 +#define SMSC_FDC37M81X_CONFPA0 0x26 +#define SMSC_FDC37M81X_CONFPA1 0x27 +#define SMSC_FDC37M81X_TEST4 0x2B +#define SMSC_FDC37M81X_TEST5 0x2C +#define SMSC_FDC37M81X_TEST1 0x2D +#define SMSC_FDC37M81X_TEST2 0x2E +#define SMSC_FDC37M81X_TEST3 0x2F /* Logical device numbers */ -#define SMSC_FDC37M81X_FDD 0x00 -#define SMSC_FDC37M81X_SERIAL1 0x04 -#define SMSC_FDC37M81X_SERIAL2 0x05 -#define SMSC_FDC37M81X_KBD 0x07 +#define SMSC_FDC37M81X_FDD 0x00 +#define SMSC_FDC37M81X_SERIAL1 0x04 +#define SMSC_FDC37M81X_SERIAL2 0x05 +#define SMSC_FDC37M81X_KBD 0x07 /* Logical device Config Registers */ -#define SMSC_FDC37M81X_ACTIVE 0x30 +#define SMSC_FDC37M81X_ACTIVE 0x30 #define SMSC_FDC37M81X_BASEADDR0 0x60 #define SMSC_FDC37M81X_BASEADDR1 0x61 -#define SMSC_FDC37M81X_INT 0x70 -#define SMSC_FDC37M81X_INT2 0x72 -#define SMSC_FDC37M81X_MODE 0xF0 +#define SMSC_FDC37M81X_INT 0x70 +#define SMSC_FDC37M81X_INT2 0x72 +#define SMSC_FDC37M81X_MODE 0xF0 /* Chip Config Values */ #define SMSC_FDC37M81X_CONFIG_ENTER 0x55 #define SMSC_FDC37M81X_CONFIG_EXIT 0xaa -#define SMSC_FDC37M81X_CHIP_ID 0x4d +#define SMSC_FDC37M81X_CHIP_ID 0x4d static unsigned long g_smsc_fdc37m81x_base; diff --git a/arch/mips/txx9/rbtx4927/irq.c b/arch/mips/txx9/rbtx4927/irq.c index 6c22c496090..3f48292c9c6 100644 --- a/arch/mips/txx9/rbtx4927/irq.c +++ b/arch/mips/txx9/rbtx4927/irq.c @@ -2,7 +2,7 @@ * Toshiba RBTX4927 specific interrupt handlers * * Author: MontaVista Software, Inc. - * source@mvista.com + * source@mvista.com * * Copyright 2001-2002 MontaVista Software Inc. * diff --git a/arch/mips/txx9/rbtx4927/prom.c b/arch/mips/txx9/rbtx4927/prom.c index cc97c6a6011..fe6d0b54763 100644 --- a/arch/mips/txx9/rbtx4927/prom.c +++ b/arch/mips/txx9/rbtx4927/prom.c @@ -2,7 +2,7 @@ * rbtx4927 specific prom routines * * Author: MontaVista Software, Inc. - * source@mvista.com + * source@mvista.com * * Copyright 2001-2002 MontaVista Software Inc. * diff --git a/arch/mips/txx9/rbtx4927/setup.c b/arch/mips/txx9/rbtx4927/setup.c index b15adfc2d72..3c516ef625e 100644 --- a/arch/mips/txx9/rbtx4927/setup.c +++ b/arch/mips/txx9/rbtx4927/setup.c @@ -2,7 +2,7 @@ * Toshiba rbtx4927 specific setup * * Author: MontaVista Software, Inc. - * source@mvista.com + * source@mvista.com * * Copyright 2001-2002 MontaVista Software Inc. * diff --git a/arch/mips/txx9/rbtx4938/setup.c b/arch/mips/txx9/rbtx4938/setup.c index d6e70dab3bd..c9afd05020e 100644 --- a/arch/mips/txx9/rbtx4938/setup.c +++ b/arch/mips/txx9/rbtx4938/setup.c @@ -107,10 +107,10 @@ static void __init rbtx4938_pci_setup(void) /* SPI support */ /* chip select for SPI devices */ -#define SEEPROM1_CS 7 /* PIO7 */ -#define SEEPROM2_CS 0 /* IOC */ -#define SEEPROM3_CS 1 /* IOC */ -#define SRTC_CS 2 /* IOC */ +#define SEEPROM1_CS 7 /* PIO7 */ +#define SEEPROM2_CS 0 /* IOC */ +#define SEEPROM3_CS 1 /* IOC */ +#define SRTC_CS 2 /* IOC */ #define SPI_BUSNO 0 static int __init rbtx4938_ethaddr_init(void) diff --git a/arch/mips/txx9/rbtx4939/setup.c b/arch/mips/txx9/rbtx4939/setup.c index e15641d9309..2da5f25f98b 100644 --- a/arch/mips/txx9/rbtx4939/setup.c +++ b/arch/mips/txx9/rbtx4939/setup.c @@ -243,7 +243,7 @@ static int __init rbtx4939_led_probe(struct platform_device *pdev) } static struct platform_driver rbtx4939_led_driver = { - .driver = { + .driver = { .name = "rbtx4939-led", .owner = THIS_MODULE, }, @@ -337,7 +337,7 @@ static void rbtx4939_flash_copy_from(struct map_info *map, void *to, shift = bdipsw & 3; while (len) { curlen = min_t(unsigned long, len, - 0x400000 - (from & (0x400000 - 1))); + 0x400000 - (from & (0x400000 - 1))); memcpy(to, (void *)((from & ~0xc00000) | ((((from >> 22) + shift) & 3) << 22)), |