diff options
author | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2008-08-07 09:55:03 +0100 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2008-08-07 09:55:03 +0100 |
commit | 4fb8af10d0fd09372d52966b76922b9e82bbc950 (patch) | |
tree | d240e4d40357583e3f3eb228dccf20122a5b31ed /arch/mips/txx9 | |
parent | f44f82e8a20b98558486eb14497b2f71c78fa325 (diff) | |
parent | 64a99d2a8c3ed5c4e39f3ae1cc682aa8fd3977fc (diff) |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/sam/kbuild-fixes
Diffstat (limited to 'arch/mips/txx9')
-rw-r--r-- | arch/mips/txx9/Kconfig | 59 | ||||
-rw-r--r-- | arch/mips/txx9/generic/Makefile | 2 | ||||
-rw-r--r-- | arch/mips/txx9/generic/dbgio.c | 48 | ||||
-rw-r--r-- | arch/mips/txx9/generic/irq_tx3927.c | 25 | ||||
-rw-r--r-- | arch/mips/txx9/generic/pci.c | 36 | ||||
-rw-r--r-- | arch/mips/txx9/generic/setup.c | 124 | ||||
-rw-r--r-- | arch/mips/txx9/generic/setup_tx3927.c | 130 | ||||
-rw-r--r-- | arch/mips/txx9/generic/setup_tx4927.c | 30 | ||||
-rw-r--r-- | arch/mips/txx9/generic/setup_tx4938.c | 41 | ||||
-rw-r--r-- | arch/mips/txx9/generic/smsc_fdc37m81x.c | 20 | ||||
-rw-r--r-- | arch/mips/txx9/jmr3927/Makefile | 1 | ||||
-rw-r--r-- | arch/mips/txx9/jmr3927/irq.c | 65 | ||||
-rw-r--r-- | arch/mips/txx9/jmr3927/kgdb_io.c | 105 | ||||
-rw-r--r-- | arch/mips/txx9/jmr3927/prom.c | 29 | ||||
-rw-r--r-- | arch/mips/txx9/jmr3927/setup.c | 204 | ||||
-rw-r--r-- | arch/mips/txx9/rbtx4927/irq.c | 161 | ||||
-rw-r--r-- | arch/mips/txx9/rbtx4927/prom.c | 1 | ||||
-rw-r--r-- | arch/mips/txx9/rbtx4927/setup.c | 97 | ||||
-rw-r--r-- | arch/mips/txx9/rbtx4938/irq.c | 107 | ||||
-rw-r--r-- | arch/mips/txx9/rbtx4938/prom.c | 1 | ||||
-rw-r--r-- | arch/mips/txx9/rbtx4938/setup.c | 124 |
21 files changed, 597 insertions, 813 deletions
diff --git a/arch/mips/txx9/Kconfig b/arch/mips/txx9/Kconfig index 6de4c5aa92b..840fe757c48 100644 --- a/arch/mips/txx9/Kconfig +++ b/arch/mips/txx9/Kconfig @@ -1,3 +1,27 @@ +config MACH_TX39XX + bool + select MACH_TXX9 + select SYS_HAS_CPU_TX39XX + +config MACH_TX49XX + bool + select MACH_TXX9 + select CEVT_R4K + select CSRC_R4K + select IRQ_CPU + select SYS_HAS_CPU_TX49XX + select SYS_SUPPORTS_64BIT_KERNEL + +config MACH_TXX9 + bool + select DMA_NONCOHERENT + select SWAP_IO_SPACE + select SYS_HAS_EARLY_PRINTK + select SYS_SUPPORTS_32BIT_KERNEL + select SYS_SUPPORTS_LITTLE_ENDIAN + select SYS_SUPPORTS_BIG_ENDIAN + select GENERIC_HARDIRQS_NO__DO_IRQ + config TOSHIBA_JMR3927 bool "Toshiba JMR-TX3927 board" depends on MACH_TX39XX @@ -24,68 +48,37 @@ config TOSHIBA_RBTX4938 config SOC_TX3927 bool select CEVT_TXX9 - select DMA_NONCOHERENT select HAS_TXX9_SERIAL select HW_HAS_PCI select IRQ_TXX9 - select SWAP_IO_SPACE - select SYS_HAS_CPU_TX39XX - select SYS_SUPPORTS_32BIT_KERNEL - select SYS_SUPPORTS_LITTLE_ENDIAN - select SYS_SUPPORTS_BIG_ENDIAN - select GENERIC_HARDIRQS_NO__DO_IRQ select GPIO_TXX9 config SOC_TX4927 bool - select CEVT_R4K - select CSRC_R4K select CEVT_TXX9 - select DMA_NONCOHERENT select HAS_TXX9_SERIAL select HW_HAS_PCI - select IRQ_CPU select IRQ_TXX9 select PCI_TX4927 - select SWAP_IO_SPACE - select SYS_HAS_CPU_TX49XX - select SYS_SUPPORTS_32BIT_KERNEL - select SYS_SUPPORTS_64BIT_KERNEL - select SYS_SUPPORTS_LITTLE_ENDIAN - select SYS_SUPPORTS_BIG_ENDIAN - select SYS_SUPPORTS_KGDB - select GENERIC_HARDIRQS_NO__DO_IRQ select GPIO_TXX9 config SOC_TX4938 bool - select CEVT_R4K - select CSRC_R4K select CEVT_TXX9 - select DMA_NONCOHERENT select HAS_TXX9_SERIAL select HW_HAS_PCI - select IRQ_CPU select IRQ_TXX9 select PCI_TX4927 - select SWAP_IO_SPACE - select SYS_HAS_CPU_TX49XX - select SYS_SUPPORTS_32BIT_KERNEL - select SYS_SUPPORTS_64BIT_KERNEL - select SYS_SUPPORTS_LITTLE_ENDIAN - select SYS_SUPPORTS_BIG_ENDIAN - select SYS_SUPPORTS_KGDB - select GENERIC_HARDIRQS_NO__DO_IRQ select GPIO_TXX9 config TOSHIBA_FPCIB0 bool "FPCIB0 Backplane Support" - depends on PCI && (MACH_TX39XX || MACH_TX49XX) + depends on PCI && MACH_TXX9 select I8259 config PICMG_PCI_BACKPLANE_DEFAULT bool "Support for PICMG PCI Backplane" - depends on PCI && (MACH_TX39XX || MACH_TX49XX) + depends on PCI && MACH_TXX9 default y if !TOSHIBA_FPCIB0 if TOSHIBA_RBTX4938 diff --git a/arch/mips/txx9/generic/Makefile b/arch/mips/txx9/generic/Makefile index 9c120771e65..9bb34af26b7 100644 --- a/arch/mips/txx9/generic/Makefile +++ b/arch/mips/txx9/generic/Makefile @@ -4,9 +4,9 @@ obj-y += setup.o obj-$(CONFIG_PCI) += pci.o +obj-$(CONFIG_SOC_TX3927) += setup_tx3927.o irq_tx3927.o obj-$(CONFIG_SOC_TX4927) += mem_tx4927.o setup_tx4927.o irq_tx4927.o obj-$(CONFIG_SOC_TX4938) += mem_tx4927.o setup_tx4938.o irq_tx4938.o obj-$(CONFIG_TOSHIBA_FPCIB0) += smsc_fdc37m81x.o -obj-$(CONFIG_KGDB) += dbgio.o EXTRA_CFLAGS += -Werror diff --git a/arch/mips/txx9/generic/dbgio.c b/arch/mips/txx9/generic/dbgio.c deleted file mode 100644 index 33b9c672a32..00000000000 --- a/arch/mips/txx9/generic/dbgio.c +++ /dev/null @@ -1,48 +0,0 @@ -/* - * linux/arch/mips/tx4938/common/dbgio.c - * - * kgdb interface for gdb - * - * Author: MontaVista Software, Inc. - * source@mvista.com - * - * Copyright 2005 MontaVista Software Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR - * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE - * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. - * - * Support for TX4938 in 2.6 - Hiroshi DOYU <Hiroshi_DOYU@montavista.co.jp> - */ - -#include <linux/types> - -extern u8 txx9_sio_kdbg_rd(void); -extern int txx9_sio_kdbg_wr( u8 ch ); - -u8 getDebugChar(void) -{ - return (txx9_sio_kdbg_rd()); -} - -int putDebugChar(u8 byte) -{ - return (txx9_sio_kdbg_wr(byte)); -} - diff --git a/arch/mips/txx9/generic/irq_tx3927.c b/arch/mips/txx9/generic/irq_tx3927.c new file mode 100644 index 00000000000..c683f593eda --- /dev/null +++ b/arch/mips/txx9/generic/irq_tx3927.c @@ -0,0 +1,25 @@ +/* + * Common tx3927 irq handler + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright 2001 MontaVista Software Inc. + * Copyright (C) 2000-2001 Toshiba Corporation + */ +#include <linux/init.h> +#include <asm/txx9irq.h> +#include <asm/txx9/tx3927.h> + +void __init tx3927_irq_init(void) +{ + int i; + + txx9_irq_init(TX3927_IRC_REG); + /* raise priority for timers, sio */ + for (i = 0; i < TX3927_NR_TMR; i++) + txx9_irq_set_pri(TX3927_IR_TMR(i), 6); + for (i = 0; i < TX3927_NR_SIO; i++) + txx9_irq_set_pri(TX3927_IR_SIO(i), 7); +} diff --git a/arch/mips/txx9/generic/pci.c b/arch/mips/txx9/generic/pci.c index 0b92d8c1320..7b637a7c0e6 100644 --- a/arch/mips/txx9/generic/pci.c +++ b/arch/mips/txx9/generic/pci.c @@ -386,3 +386,39 @@ int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { return txx9_board_vec->pci_map_irq(dev, slot, pin); } + +char * (*txx9_board_pcibios_setup)(char *str) __devinitdata; + +char *__devinit txx9_pcibios_setup(char *str) +{ + if (txx9_board_pcibios_setup && !txx9_board_pcibios_setup(str)) + return NULL; + if (!strcmp(str, "picmg")) { + /* PICMG compliant backplane (TOSHIBA JMB-PICMG-ATX + (5V or 3.3V), JMB-PICMG-L2 (5V only), etc.) */ + txx9_pci_option |= TXX9_PCI_OPT_PICMG; + return NULL; + } else if (!strcmp(str, "nopicmg")) { + /* non-PICMG compliant backplane (TOSHIBA + RBHBK4100,RBHBK4200, Interface PCM-PCM05, etc.) */ + txx9_pci_option &= ~TXX9_PCI_OPT_PICMG; + return NULL; + } else if (!strncmp(str, "clk=", 4)) { + char *val = str + 4; + txx9_pci_option &= ~TXX9_PCI_OPT_CLK_MASK; + if (strcmp(val, "33") == 0) + txx9_pci_option |= TXX9_PCI_OPT_CLK_33; + else if (strcmp(val, "66") == 0) + txx9_pci_option |= TXX9_PCI_OPT_CLK_66; + else /* "auto" */ + txx9_pci_option |= TXX9_PCI_OPT_CLK_AUTO; + return NULL; + } else if (!strncmp(str, "err=", 4)) { + if (!strcmp(str + 4, "panic")) + txx9_pci_err_action = TXX9_PCI_ERR_PANIC; + else if (!strcmp(str + 4, "ignore")) + txx9_pci_err_action = TXX9_PCI_ERR_IGNORE; + return NULL; + } + return str; +} diff --git a/arch/mips/txx9/generic/setup.c b/arch/mips/txx9/generic/setup.c index 8c60c78b9a9..1bc57d0f4c5 100644 --- a/arch/mips/txx9/generic/setup.c +++ b/arch/mips/txx9/generic/setup.c @@ -20,9 +20,13 @@ #include <linux/clk.h> #include <linux/err.h> #include <linux/gpio.h> +#include <linux/platform_device.h> +#include <linux/serial_core.h> #include <asm/bootinfo.h> #include <asm/time.h> +#include <asm/reboot.h> #include <asm/txx9/generic.h> +#include <asm/txx9/pci.h> #ifdef CONFIG_CPU_TX49XX #include <asm/txx9/tx4938.h> #endif @@ -187,6 +191,117 @@ char * __init prom_getcmdline(void) return &(arcs_cmdline[0]); } +static void __noreturn txx9_machine_halt(void) +{ + local_irq_disable(); + clear_c0_status(ST0_IM); + while (1) { + if (cpu_wait) { + (*cpu_wait)(); + if (cpu_has_counter) { + /* + * Clear counter interrupt while it + * breaks WAIT instruction even if + * masked. + */ + write_c0_compare(0); + } + } + } +} + +/* Watchdog support */ +void __init txx9_wdt_init(unsigned long base) +{ + struct resource res = { + .start = base, + .end = base + 0x100 - 1, + .flags = IORESOURCE_MEM, + }; + platform_device_register_simple("txx9wdt", -1, &res, 1); +} + +/* SPI support */ +void __init txx9_spi_init(int busid, unsigned long base, int irq) +{ + struct resource res[] = { + { + .start = base, + .end = base + 0x20 - 1, + .flags = IORESOURCE_MEM, + }, { + .start = irq, + .flags = IORESOURCE_IRQ, + }, + }; + platform_device_register_simple("spi_txx9", busid, + res, ARRAY_SIZE(res)); +} + +void __init txx9_ethaddr_init(unsigned int id, unsigned char *ethaddr) +{ + struct platform_device *pdev = + platform_device_alloc("tc35815-mac", id); + if (!pdev || + platform_device_add_data(pdev, ethaddr, 6) || + platform_device_add(pdev)) + platform_device_put(pdev); +} + +void __init txx9_sio_init(unsigned long baseaddr, int irq, + unsigned int line, unsigned int sclk, int nocts) +{ +#ifdef CONFIG_SERIAL_TXX9 + struct uart_port req; + + memset(&req, 0, sizeof(req)); + req.line = line; + req.iotype = UPIO_MEM; + req.membase = ioremap(baseaddr, 0x24); + req.mapbase = baseaddr; + req.irq = irq; + if (!nocts) + req.flags |= UPF_BUGGY_UART /*HAVE_CTS_LINE*/; + if (sclk) { + req.flags |= UPF_MAGIC_MULTIPLIER /*USE_SCLK*/; + req.uartclk = sclk; + } else + req.uartclk = TXX9_IMCLK; + early_serial_txx9_setup(&req); +#endif /* CONFIG_SERIAL_TXX9 */ +} + +#ifdef CONFIG_EARLY_PRINTK +static void __init null_prom_putchar(char c) +{ +} +void (*txx9_prom_putchar)(char c) __initdata = null_prom_putchar; + +void __init prom_putchar(char c) +{ + txx9_prom_putchar(c); +} + +static void __iomem *early_txx9_sio_port; + +static void __init early_txx9_sio_putchar(char c) +{ +#define TXX9_SICISR 0x0c +#define TXX9_SITFIFO 0x1c +#define TXX9_SICISR_TXALS 0x00000002 + while (!(__raw_readl(early_txx9_sio_port + TXX9_SICISR) & + TXX9_SICISR_TXALS)) + ; + __raw_writel(c, early_txx9_sio_port + TXX9_SITFIFO); +} + +void __init txx9_sio_putchar_init(unsigned long baseaddr) +{ + early_txx9_sio_port = ioremap(baseaddr, 0x24); + txx9_prom_putchar = early_txx9_sio_putchar; +} +#endif /* CONFIG_EARLY_PRINTK */ + /* wrappers */ void __init plat_mem_setup(void) { @@ -194,6 +309,15 @@ void __init plat_mem_setup(void) ioport_resource.end = ~0UL; /* no limit */ iomem_resource.start = 0; iomem_resource.end = ~0UL; /* no limit */ + + /* fallback restart/halt routines */ + _machine_restart = (void (*)(char *))txx9_machine_halt; + _machine_halt = txx9_machine_halt; + pm_power_off = txx9_machine_halt; + +#ifdef CONFIG_PCI + pcibios_plat_setup = txx9_pcibios_setup; +#endif txx9_board_vec->mem_setup(); } diff --git a/arch/mips/txx9/generic/setup_tx3927.c b/arch/mips/txx9/generic/setup_tx3927.c new file mode 100644 index 00000000000..7bd963d37fc --- /dev/null +++ b/arch/mips/txx9/generic/setup_tx3927.c @@ -0,0 +1,130 @@ +/* + * TX3927 setup routines + * Based on linux/arch/mips/txx9/jmr3927/setup.c + * + * Copyright 2001 MontaVista Software Inc. + * Copyright (C) 2000-2001 Toshiba Corporation + * Copyright (C) 2007 Ralf Baechle (ralf@linux-mips.org) + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include <linux/init.h> +#include <linux/ioport.h> +#include <linux/delay.h> +#include <linux/param.h> +#include <linux/io.h> +#include <asm/mipsregs.h> +#include <asm/txx9irq.h> +#include <asm/txx9tmr.h> +#include <asm/txx9pio.h> +#include <asm/txx9/generic.h> +#include <asm/txx9/tx3927.h> + +void __init tx3927_wdt_init(void) +{ + txx9_wdt_init(TX3927_TMR_REG(2)); +} + +void __init tx3927_setup(void) +{ + int i; + unsigned int conf; + + /* don't enable - see errata */ + txx9_ccfg_toeon = 0; + if (strstr(prom_getcmdline(), "toeon") != NULL) + txx9_ccfg_toeon = 1; + + txx9_reg_res_init(TX3927_REV_PCODE(), TX3927_REG_BASE, + TX3927_REG_SIZE); + + /* SDRAMC,ROMC are configured by PROM */ + for (i = 0; i < 8; i++) { + if (!(tx3927_romcptr->cr[i] & 0x8)) + continue; /* disabled */ + txx9_ce_res[i].start = (unsigned long)TX3927_ROMC_BA(i); + txx9_ce_res[i].end = + txx9_ce_res[i].start + TX3927_ROMC_SIZE(i) - 1; + request_resource(&iomem_resource, &txx9_ce_res[i]); + } + + /* clocks */ + txx9_gbus_clock = txx9_cpu_clock / 2; + /* change default value to udelay/mdelay take reasonable time */ + loops_per_jiffy = txx9_cpu_clock / HZ / 2; + + /* CCFG */ + /* enable Timeout BusError */ + if (txx9_ccfg_toeon) + tx3927_ccfgptr->ccfg |= TX3927_CCFG_TOE; + + /* clear BusErrorOnWrite flag */ + tx3927_ccfgptr->ccfg &= ~TX3927_CCFG_BEOW; + if (read_c0_conf() & TX39_CONF_WBON) + /* Disable PCI snoop */ + tx3927_ccfgptr->ccfg &= ~TX3927_CCFG_PSNP; + else + /* Enable PCI SNOOP - with write through only */ + tx3927_ccfgptr->ccfg |= TX3927_CCFG_PSNP; + /* do reset on watchdog */ + tx3927_ccfgptr->ccfg |= TX3927_CCFG_WR; + + printk(KERN_INFO "TX3927 -- CRIR:%08lx CCFG:%08lx PCFG:%08lx\n", + tx3927_ccfgptr->crir, + tx3927_ccfgptr->ccfg, tx3927_ccfgptr->pcfg); + + /* TMR */ + for (i = 0; i < TX3927_NR_TMR; i++) + txx9_tmr_init(TX3927_TMR_REG(i)); + + /* DMA */ + tx3927_dmaptr->mcr = 0; + for (i = 0; i < ARRAY_SIZE(tx3927_dmaptr->ch); i++) { + /* reset channel */ + tx3927_dmaptr->ch[i].ccr = TX3927_DMA_CCR_CHRST; + tx3927_dmaptr->ch[i].ccr = 0; + } + /* enable DMA */ +#ifdef __BIG_ENDIAN + tx3927_dmaptr->mcr = TX3927_DMA_MCR_MSTEN; +#else + tx3927_dmaptr->mcr = TX3927_DMA_MCR_MSTEN | TX3927_DMA_MCR_LE; +#endif + + /* PIO */ + __raw_writel(0, &tx3927_pioptr->maskcpu); + __raw_writel(0, &tx3927_pioptr->maskext); + txx9_gpio_init(TX3927_PIO_REG, 0, 16); + + conf = read_c0_conf(); + if (!(conf & TX39_CONF_ICE)) + printk(KERN_INFO "TX3927 I-Cache disabled.\n"); + if (!(conf & TX39_CONF_DCE)) + printk(KERN_INFO "TX3927 D-Cache disabled.\n"); + else if (!(conf & TX39_CONF_WBON)) + printk(KERN_INFO "TX3927 D-Cache WriteThrough.\n"); + else if (!(conf & TX39_CONF_CWFON)) + printk(KERN_INFO "TX3927 D-Cache WriteBack.\n"); + else + printk(KERN_INFO "TX3927 D-Cache WriteBack (CWF) .\n"); +} + +void __init tx3927_time_init(unsigned int evt_tmrnr, unsigned int src_tmrnr) +{ + txx9_clockevent_init(TX3927_TMR_REG(evt_tmrnr), + TXX9_IRQ_BASE + TX3927_IR_TMR(evt_tmrnr), + TXX9_IMCLK); + txx9_clocksource_init(TX3927_TMR_REG(src_tmrnr), TXX9_IMCLK); +} + +void __init tx3927_sio_init(unsigned int sclk, unsigned int cts_mask) +{ + int i; + + for (i = 0; i < 2; i++) + txx9_sio_init(TX3927_SIO_REG(i), + TXX9_IRQ_BASE + TX3927_IR_SIO(i), + i, sclk, (1 << i) & cts_mask); +} diff --git a/arch/mips/txx9/generic/setup_tx4927.c b/arch/mips/txx9/generic/setup_tx4927.c index 89d6e28add9..f80d4b7a694 100644 --- a/arch/mips/txx9/generic/setup_tx4927.c +++ b/arch/mips/txx9/generic/setup_tx4927.c @@ -13,7 +13,6 @@ #include <linux/init.h> #include <linux/ioport.h> #include <linux/delay.h> -#include <linux/serial_core.h> #include <linux/param.h> #include <asm/txx9irq.h> #include <asm/txx9tmr.h> @@ -21,7 +20,7 @@ #include <asm/txx9/generic.h> #include <asm/txx9/tx4927.h> -void __init tx4927_wdr_init(void) +static void __init tx4927_wdr_init(void) { /* clear WatchDogReset (W1C) */ tx4927_ccfg_set(TX4927_CCFG_WDRST); @@ -29,6 +28,11 @@ void __init tx4927_wdr_init(void) tx4927_ccfg_set(TX4927_CCFG_WR); } +void __init tx4927_wdt_init(void) +{ + txx9_wdt_init(TX4927_TMR_REG(2) & 0xfffffffffULL); +} + static struct resource tx4927_sdram_resource[4]; void __init tx4927_setup(void) @@ -173,22 +177,12 @@ void __init tx4927_time_init(unsigned int tmrnr) TXX9_IMCLK); } -void __init tx4927_setup_serial(void) +void __init tx4927_sio_init(unsigned int sclk, unsigned int cts_mask) { -#ifdef CONFIG_SERIAL_TXX9 int i; - struct uart_port req; - - for (i = 0; i < 2; i++) { - memset(&req, 0, sizeof(req)); - req.line = i; - req.iotype = UPIO_MEM; - req.membase = (unsigned char __iomem *)TX4927_SIO_REG(i); - req.mapbase = TX4927_SIO_REG(i) & 0xfffffffffULL; - req.irq = TXX9_IRQ_BASE + TX4927_IR_SIO(i); - req.flags |= UPF_BUGGY_UART /*HAVE_CTS_LINE*/; - req.uartclk = TXX9_IMCLK; - early_serial_txx9_setup(&req); - } -#endif /* CONFIG_SERIAL_TXX9 */ + + for (i = 0; i < 2; i++) + txx9_sio_init(TX4927_SIO_REG(i) & 0xfffffffffULL, + TXX9_IRQ_BASE + TX4927_IR_SIO(i), + i, sclk, (1 << i) & cts_mask); } diff --git a/arch/mips/txx9/generic/setup_tx4938.c b/arch/mips/txx9/generic/setup_tx4938.c index 317378d8579..f3040b9ba05 100644 --- a/arch/mips/txx9/generic/setup_tx4938.c +++ b/arch/mips/txx9/generic/setup_tx4938.c @@ -13,7 +13,6 @@ #include <linux/init.h> #include <linux/ioport.h> #include <linux/delay.h> -#include <linux/serial_core.h> #include <linux/param.h> #include <asm/txx9irq.h> #include <asm/txx9tmr.h> @@ -21,7 +20,7 @@ #include <asm/txx9/generic.h> #include <asm/txx9/tx4938.h> -void __init tx4938_wdr_init(void) +static void __init tx4938_wdr_init(void) { /* clear WatchDogReset (W1C) */ tx4938_ccfg_set(TX4938_CCFG_WDRST); @@ -29,6 +28,11 @@ void __init tx4938_wdr_init(void) tx4938_ccfg_set(TX4938_CCFG_WR); } +void __init tx4938_wdt_init(void) +{ + txx9_wdt_init(TX4938_TMR_REG(2) & 0xfffffffffULL); +} + static struct resource tx4938_sdram_resource[4]; static struct resource tx4938_sram_resource; @@ -233,11 +237,9 @@ void __init tx4938_time_init(unsigned int tmrnr) TXX9_IMCLK); } -void __init tx4938_setup_serial(void) +void __init tx4938_sio_init(unsigned int sclk, unsigned int cts_mask) { -#ifdef CONFIG_SERIAL_TXX9 int i; - struct uart_port req; unsigned int ch_mask = 0; if (__raw_readq(&tx4938_ccfgptr->pcfg) & TX4938_PCFG_ETH0_SEL) @@ -245,15 +247,24 @@ void __init tx4938_setup_serial(void) for (i = 0; i < 2; i++) { if ((1 << i) & ch_mask) continue; - memset(&req, 0, sizeof(req)); - req.line = i; - req.iotype = UPIO_MEM; - req.membase = (unsigned char __iomem *)TX4938_SIO_REG(i); - req.mapbase = TX4938_SIO_REG(i) & 0xfffffffffULL; - req.irq = TXX9_IRQ_BASE + TX4938_IR_SIO(i); - req.flags |= UPF_BUGGY_UART /*HAVE_CTS_LINE*/; - req.uartclk = TXX9_IMCLK; - early_serial_txx9_setup(&req); + txx9_sio_init(TX4938_SIO_REG(i) & 0xfffffffffULL, + TXX9_IRQ_BASE + TX4938_IR_SIO(i), + i, sclk, (1 << i) & cts_mask); } -#endif /* CONFIG_SERIAL_TXX9 */ +} + +void __init tx4938_spi_init(int busid) +{ + txx9_spi_init(busid, TX4938_SPI_REG & 0xfffffffffULL, + TXX9_IRQ_BASE + TX4938_IR_SPI); +} + +void __init tx4938_ethaddr_init(unsigned char *addr0, unsigned char *addr1) +{ + u64 pcfg = __raw_readq(&tx4938_ccfgptr->pcfg); + + if (addr0 && (pcfg & TX4938_PCFG_ETH0_SEL)) + txx9_ethaddr_init(TXX9_IRQ_BASE + TX4938_IR_ETH0, addr0); + if (addr1 && (pcfg & TX4938_PCFG_ETH1_SEL)) + txx9_ethaddr_init(TXX9_IRQ_BASE + TX4938_IR_ETH1, addr1); } diff --git a/arch/mips/txx9/generic/smsc_fdc37m81x.c b/arch/mips/txx9/generic/smsc_fdc37m81x.c index 69e487467fa..a2b2d62d88e 100644 --- a/arch/mips/txx9/generic/smsc_fdc37m81x.c +++ b/arch/mips/txx9/generic/smsc_fdc37m81x.c @@ -15,8 +15,6 @@ #include <asm/io.h> #include <asm/txx9/smsc_fdc37m81x.h> -#define DEBUG - /* Common Registers */ #define SMSC_FDC37M81X_CONFIG_INDEX 0x00 #define SMSC_FDC37M81X_CONFIG_DATA 0x01 @@ -55,7 +53,7 @@ #define SMSC_FDC37M81X_CONFIG_EXIT 0xaa #define SMSC_FDC37M81X_CHIP_ID 0x4d -static unsigned long g_smsc_fdc37m81x_base = 0; +static unsigned long g_smsc_fdc37m81x_base; static inline unsigned char smsc_fdc37m81x_rd(unsigned char index) { @@ -107,7 +105,8 @@ unsigned long __init smsc_fdc37m81x_init(unsigned long port) u8 chip_id; if (g_smsc_fdc37m81x_base) - printk("smsc_fdc37m81x_init() stepping on old base=0x%0*lx\n", + printk(KERN_WARNING "%s: stepping on old base=0x%0*lx\n", + __func__, field, g_smsc_fdc37m81x_base); g_smsc_fdc37m81x_base = port; @@ -118,7 +117,7 @@ unsigned long __init smsc_fdc37m81x_init(unsigned long port) if (chip_id == SMSC_FDC37M81X_CHIP_ID) smsc_fdc37m81x_config_end(); else { - printk("smsc_fdc37m81x_init() unknow chip id 0x%02x\n", + printk(KERN_WARNING "%s: unknow chip id 0x%02x\n", __func__, chip_id); g_smsc_fdc37m81x_base = 0; } @@ -127,22 +126,23 @@ unsigned long __init smsc_fdc37m81x_init(unsigned long port) } #ifdef DEBUG -void smsc_fdc37m81x_config_dump_one(char *key, u8 dev, u8 reg) +static void smsc_fdc37m81x_config_dump_one(const char *key, u8 dev, u8 reg) { - printk("%s: dev=0x%02x reg=0x%02x val=0x%02x\n", key, dev, reg, + printk(KERN_INFO "%s: dev=0x%02x reg=0x%02x val=0x%02x\n", + key, dev, reg, smsc_fdc37m81x_rd(reg)); } void smsc_fdc37m81x_config_dump(void) { u8 orig; - char *fname = "smsc_fdc37m81x_config_dump()"; + const char *fname = __func__; smsc_fdc37m81x_config_beg(); orig = smsc_fdc37m81x_rd(SMSC_FDC37M81X_DNUM); - printk("%s: common\n", fname); + printk(KERN_INFO "%s: common\n", fname); smsc_fdc37m81x_config_dump_one(fname, SMSC_FDC37M81X_NONE, SMSC_FDC37M81X_DNUM); smsc_fdc37m81x_config_dump_one(fname, SMSC_FDC37M81X_NONE, @@ -154,7 +154,7 @@ void smsc_fdc37m81x_config_dump(void) smsc_fdc37m81x_config_dump_one(fname, SMSC_FDC37M81X_NONE, SMSC_FDC37M81X_PMGT); - printk("%s: keyboard\n", fname); + printk(KERN_INFO "%s: keyboard\n", fname); smsc_dc37m81x_wr(SMSC_FDC37M81X_DNUM, SMSC_FDC37M81X_KBD); smsc_fdc37m81x_config_dump_one(fname, SMSC_FDC37M81X_KBD, SMSC_FDC37M81X_ACTIVE); diff --git a/arch/mips/txx9/jmr3927/Makefile b/arch/mips/txx9/jmr3927/Makefile index ba292c94566..20d61ac543e 100644 --- a/arch/mips/txx9/jmr3927/Makefile +++ b/arch/mips/txx9/jmr3927/Makefile @@ -3,6 +3,5 @@ # obj-y += prom.o irq.o setup.o -obj-$(CONFIG_KGDB) += kgdb_io.o EXTRA_CFLAGS += -Werror diff --git a/arch/mips/txx9/jmr3927/irq.c b/arch/mips/txx9/jmr3927/irq.c index 070c9a115e5..6ec626c9473 100644 --- a/arch/mips/txx9/jmr3927/irq.c +++ b/arch/mips/txx9/jmr3927/irq.c @@ -30,15 +30,11 @@ * 675 Mass Ave, Cambridge, MA 02139, USA. */ #include <linux/init.h> -#include <linux/sched.h> #include <linux/types.h> #include <linux/interrupt.h> #include <asm/io.h> #include <asm/mipsregs.h> -#include <asm/system.h> - -#include <asm/processor.h> #include <asm/txx9/generic.h> #include <asm/txx9/jmr3927.h> @@ -46,13 +42,6 @@ #error JMR3927_IRQ_END > NR_IRQS #endif -static unsigned char irc_level[TX3927_NUM_IR] = { - 5, 5, 5, 5, 5, 5, /* INT[5:0] */ - 7, 7, /* SIO */ - 5, 5, 5, 0, 0, /* DMA, PIO, PCI */ - 6, 6, 6 /* TMR */ -}; - /* * CP0_STATUS is a thread's resource (saved/restored on context switch). * So disable_irq/enable_irq MUST handle IOC/IRC registers. @@ -103,26 +92,18 @@ static int jmr3927_irq_dispatch(int pending) return irq; } -#ifdef CONFIG_PCI -static irqreturn_t jmr3927_pcierr_interrupt(int irq, void *dev_id) -{ - printk(KERN_WARNING "PCI error interrupt (irq 0x%x).\n", irq); - printk(KERN_WARNING "pcistat:%02x, lbstat:%04lx\n", - tx3927_pcicptr->pcistat, tx3927_pcicptr->lbstat); - - return IRQ_HANDLED; -} -static struct irqaction pcierr_action = { - .handler = jmr3927_pcierr_interrupt, - .mask = CPU_MASK_NONE, - .name = "PCI error", +static struct irq_chip jmr3927_irq_ioc = { + .name = "jmr3927_ioc", + .ack = mask_irq_ioc, + .mask = mask_irq_ioc, + .mask_ack = mask_irq_ioc, + .unmask = unmask_irq_ioc, }; -#endif - -static void __init jmr3927_irq_init(void); void __init jmr3927_irq_setup(void) { + int i; + txx9_irq_dispatch = jmr3927_irq_dispatch; /* Now, interrupt control disabled, */ /* all IRC interrupts are masked, */ @@ -138,34 +119,10 @@ void __init jmr3927_irq_setup(void) /* clear PCI Reset interrupts */ jmr3927_ioc_reg_out(0, JMR3927_IOC_RESET_ADDR); - jmr3927_irq_init(); + tx3927_irq_init(); + for (i = JMR3927_IRQ_IOC; i < JMR3927_IRQ_IOC + JMR3927_NR_IRQ_IOC; i++) + set_irq_chip_and_handler(i, &jmr3927_irq_ioc, handle_level_irq); /* setup IOC interrupt 1 (PCI, MODEM) */ set_irq_chained_handler(JMR3927_IRQ_IOCINT, handle_simple_irq); - -#ifdef CONFIG_PCI - setup_irq(JMR3927_IRQ_IRC_PCI, &pcierr_action); -#endif - - /* enable all CPU interrupt bits. */ - set_c0_status(ST0_IM); /* IE bit is still 0. */ -} - -static struct irq_chip jmr3927_irq_ioc = { - .name = "jmr3927_ioc", - .ack = mask_irq_ioc, - .mask = mask_irq_ioc, - .mask_ack = mask_irq_ioc, - .unmask = unmask_irq_ioc, -}; - -static void __init jmr3927_irq_init(void) -{ - u32 i; - - txx9_irq_init(TX3927_IRC_REG); - for (i = 0; i < TXx9_MAX_IR; i++) - txx9_irq_set_pri(i, irc_level[i]); - for (i = JMR3927_IRQ_IOC; i < JMR3927_IRQ_IOC + JMR3927_NR_IRQ_IOC; i++) - set_irq_chip_and_handler(i, &jmr3927_irq_ioc, handle_level_irq); } diff --git a/arch/mips/txx9/jmr3927/kgdb_io.c b/arch/mips/txx9/jmr3927/kgdb_io.c deleted file mode 100644 index 5bd757e56f7..00000000000 --- a/arch/mips/txx9/jmr3927/kgdb_io.c +++ /dev/null @@ -1,105 +0,0 @@ -/* - * BRIEF MODULE DESCRIPTION - * Low level uart routines to directly access a TX[34]927 SIO. - * - * Copyright 2001 MontaVista Software Inc. - * Author: MontaVista Software, Inc. - * ahennessy@mvista.com or source@mvista.com - * - * Based on arch/mips/ddb5xxx/ddb5477/kgdb_io.c - * - * Copyright (C) 2000-2001 Toshiba Corporation - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -#include <asm/txx9/jmr3927.h> - -#define TIMEOUT 0xffffff - -static int remoteDebugInitialized = 0; -static void debugInit(int baud); - -int putDebugChar(unsigned char c) -{ - int i = 0; - - if (!remoteDebugInitialized) { - remoteDebugInitialized = 1; - debugInit(38400); - } - - do { - slow_down(); - i++; - if (i>TIMEOUT) { - break; - } - } while (!(tx3927_sioptr(0)->cisr & TXx927_SICISR_TXALS)); - tx3927_sioptr(0)->tfifo = c; - - return 1; -} - -unsigned char getDebugChar(void) -{ - int i = 0; - int dicr; - char c; - - if (!remoteDebugInitialized) { - remoteDebugInitialized = 1; - debugInit(38400); - } - - /* diable RX int. */ - dicr = tx3927_sioptr(0)->dicr; - tx3927_sioptr(0)->dicr = 0; - - do { - slow_down(); - i++; - if (i>TIMEOUT) { - break; - } - } while (tx3927_sioptr(0)->disr & TXx927_SIDISR_UVALID) - ; - c = tx3927_sioptr(0)->rfifo; - - /* clear RX int. status */ - tx3927_sioptr(0)->disr &= ~TXx927_SIDISR_RDIS; - /* enable RX int. */ - tx3927_sioptr(0)->dicr = dicr; - - return c; -} - -static void debugInit(int baud) -{ - tx3927_sioptr(0)->lcr = 0x020; - tx3927_sioptr(0)->dicr = 0; - tx3927_sioptr(0)->disr = 0x4100; - tx3927_sioptr(0)->cisr = 0x014; - tx3927_sioptr(0)->fcr = 0; - tx3927_sioptr(0)->flcr = 0x02; - tx3927_sioptr(0)->bgr = ((JMR3927_BASE_BAUD + baud / 2) / baud) | - TXx927_SIBGR_BCLK_T0; -} diff --git a/arch/mips/txx9/jmr3927/prom.c b/arch/mips/txx9/jmr3927/prom.c index 2cadb423fac..70c4c8ec3e8 100644 --- a/arch/mips/txx9/jmr3927/prom.c +++ b/arch/mips/txx9/jmr3927/prom.c @@ -36,41 +36,18 @@ * 675 Mass Ave, Cambridge, MA 02139, USA. */ #include <linux/init.h> +#include <linux/kernel.h> #include <asm/bootinfo.h> #include <asm/txx9/generic.h> #include <asm/txx9/jmr3927.h> -#define TIMEOUT 0xffffff - -void -prom_putchar(char c) -{ - int i = 0; - - do { - i++; - if (i>TIMEOUT) - break; - } while (!(tx3927_sioptr(1)->cisr & TXx927_SICISR_TXALS)); - tx3927_sioptr(1)->tfifo = c; - return; -} - -void -puts(const char *cp) -{ - while (*cp) - prom_putchar(*cp++); - prom_putchar('\r'); - prom_putchar('\n'); -} - void __init jmr3927_prom_init(void) { /* CCFG */ if ((tx3927_ccfgptr->ccfg & TX3927_CCFG_TLBOFF) == 0) - puts("Warning: TX3927 TLB off\n"); + printk(KERN_ERR "TX3927 TLB off\n"); prom_init_cmdline(); add_memory_region(0, JMR3927_SDRAM_SIZE, BOOT_MEM_RAM); + txx9_sio_putchar_init(TX3927_SIO_REG(1)); } diff --git a/arch/mips/txx9/jmr3927/setup.c b/arch/mips/txx9/jmr3927/setup.c index 03647ebe413..87db41be8a5 100644 --- a/arch/mips/txx9/jmr3927/setup.c +++ b/arch/mips/txx9/jmr3927/setup.c @@ -32,27 +32,18 @@ #include <linux/types.h> #include <linux/ioport.h> #include <linux/delay.h> -#include <linux/pm.h> #include <linux/platform_device.h> #include <linux/gpio.h> -#ifdef CONFIG_SERIAL_TXX9 -#include <linux/serial_core.h> -#endif -#include <asm/txx9tmr.h> -#include <asm/txx9pio.h> #include <asm/reboot.h> +#include <asm/txx9pio.h> #include <asm/txx9/generic.h> #include <asm/txx9/pci.h> #include <asm/txx9/jmr3927.h> #include <asm/mipsregs.h> -extern void puts(const char *cp); - -/* don't enable - see errata */ -static int jmr3927_ccfg_toeon; - -static inline void do_reset(void) +static void jmr3927_machine_restart(char *command) { + local_irq_disable(); #if 1 /* Resetting PCI bus */ jmr3927_ioc_reg_out(0, JMR3927_IOC_RESET_ADDR); jmr3927_ioc_reg_out(JMR3927_IOC_RESET_PCI, JMR3927_IOC_RESET_ADDR); @@ -61,33 +52,13 @@ static inline void do_reset(void) jmr3927_ioc_reg_out(0, JMR3927_IOC_RESET_ADDR); #endif jmr3927_ioc_reg_out(JMR3927_IOC_RESET_CPU, JMR3927_IOC_RESET_ADDR); -} - -static void jmr3927_machine_restart(char *command) -{ - local_irq_disable(); - puts("Rebooting..."); - do_reset(); -} - -static void jmr3927_machine_halt(void) -{ - puts("JMR-TX3927 halted.\n"); - while (1); -} - -static void jmr3927_machine_power_off(void) -{ - puts("JMR-TX3927 halted. Please turn off the power.\n"); - while (1); + /* fallback */ + (*_machine_halt)(); } static void __init jmr3927_time_init(void) { - txx9_clockevent_init(TX3927_TMR_REG(0), - TXX9_IRQ_BASE + JMR3927_IRQ_IRC_TMR(0), - JMR3927_IMCLK); - txx9_clocksource_init(TX3927_TMR_REG(1), JMR3927_IMCLK); + tx3927_time_init(0, 1); } #define DO_WRITE_THROUGH @@ -102,11 +73,6 @@ static void __init jmr3927_mem_setup(void) set_io_port_base(JMR3927_PORT_BASE + JMR3927_PCIIO); _machine_restart = jmr3927_machine_restart; - _machine_halt = jmr3927_machine_halt; - pm_power_off = jmr3927_machine_power_off; - - /* Reboot on panic */ - panic_timeout = 180; /* cache setup */ { @@ -125,7 +91,8 @@ static void __init jmr3927_mem_setup(void) #endif conf = read_c0_conf(); - conf &= ~(TX39_CONF_ICE | TX39_CONF_DCE | TX39_CONF_WBON | TX39_CONF_CWFON); + conf &= ~(TX39_CONF_ICE | TX39_CONF_DCE | + TX39_CONF_WBON | TX39_CONF_CWFON); conf |= mips_ic_disable ? 0 : TX39_CONF_ICE; conf |= mips_dc_disable ? 0 : TX39_CONF_DCE; conf |= mips_config_wbon ? TX39_CONF_WBON : 0; @@ -138,47 +105,14 @@ static void __init jmr3927_mem_setup(void) /* initialize board */ jmr3927_board_init(); - argptr = prom_getcmdline(); - - if ((argptr = strstr(argptr, "toeon")) != NULL) - jmr3927_ccfg_toeon = 1; - argptr = prom_getcmdline(); - if ((argptr = strstr(argptr, "ip=")) == NULL) { - argptr = prom_getcmdline(); - strcat(argptr, " ip=bootp"); - } - -#ifdef CONFIG_SERIAL_TXX9 - { - extern int early_serial_txx9_setup(struct uart_port *port); - int i; - struct uart_port req; - for(i = 0; i < 2; i++) { - memset(&req, 0, sizeof(req)); - req.line = i; - req.iotype = UPIO_MEM; - req.membase = (unsigned char __iomem *)TX3927_SIO_REG(i); - req.mapbase = TX3927_SIO_REG(i); - req.irq = i == 0 ? - JMR3927_IRQ_IRC_SIO0 : JMR3927_IRQ_IRC_SIO1; - if (i == 0) - req.flags |= UPF_BUGGY_UART /*HAVE_CTS_LINE*/; - req.uartclk = JMR3927_IMCLK; - early_serial_txx9_setup(&req); - } - } + tx3927_sio_init(0, 1 << 1); /* ch1: noCTS */ #ifdef CONFIG_SERIAL_TXX9_CONSOLE argptr = prom_getcmdline(); - if ((argptr = strstr(argptr, "console=")) == NULL) { - argptr = prom_getcmdline(); + if (!strstr(argptr, "console=")) strcat(argptr, " console=ttyS1,115200"); - } -#endif #endif } -static void tx3927_setup(void); - static void __init jmr3927_pci_setup(void) { #ifdef CONFIG_PCI @@ -199,32 +133,13 @@ static void __init jmr3927_pci_setup(void) jmr3927_ioc_reg_out(0, JMR3927_IOC_RESET_ADDR); } tx3927_pcic_setup(c, JMR3927_SDRAM_SIZE, extarb); + tx3927_setup_pcierr_irq(); #endif /* CONFIG_PCI */ } static void __init jmr3927_board_init(void) { - tx3927_setup(); - jmr3927_pci_setup(); - - /* SIO0 DTR on */ - jmr3927_ioc_reg_out(0, JMR3927_IOC_DTR_ADDR); - - jmr3927_led_set(0); - - printk("JMR-TX3927 (Rev %d) --- IOC(Rev %d) DIPSW:%d,%d,%d,%d\n", - jmr3927_ioc_reg_in(JMR3927_IOC_BREV_ADDR) & JMR3927_REV_MASK, - jmr3927_ioc_reg_in(JMR3927_IOC_REV_ADDR) & JMR3927_REV_MASK, - jmr3927_dipsw1(), jmr3927_dipsw2(), - jmr3927_dipsw3(), jmr3927_dipsw4()); -} - -static void __init tx3927_setup(void) -{ - int i; - txx9_cpu_clock = JMR3927_CORECLK; - txx9_gbus_clock = JMR3927_GBUSCLK; /* SDRAMC are configured by PROM */ /* ROMC */ @@ -233,74 +148,32 @@ static void __init tx3927_setup(void) tx3927_romcptr->cr[3] = JMR3927_ROMCE3 | 0x0003f698; tx3927_romcptr->cr[5] = JMR3927_ROMCE5 | 0x0000f218; - /* CCFG */ - /* enable Timeout BusError */ - if (jmr3927_ccfg_toeon) - tx3927_ccfgptr->ccfg |= TX3927_CCFG_TOE; - - /* clear BusErrorOnWrite flag */ - tx3927_ccfgptr->ccfg &= ~TX3927_CCFG_BEOW; - /* Disable PCI snoop */ - tx3927_ccfgptr->ccfg &= ~TX3927_CCFG_PSNP; - /* do reset on watchdog */ - tx3927_ccfgptr->ccfg |= TX3927_CCFG_WR; - -#ifdef DO_WRITE_THROUGH - /* Enable PCI SNOOP - with write through only */ - tx3927_ccfgptr->ccfg |= TX3927_CCFG_PSNP; -#endif - /* Pin selection */ tx3927_ccfgptr->pcfg &= ~TX3927_PCFG_SELALL; tx3927_ccfgptr->pcfg |= TX3927_PCFG_SELSIOC(0) | TX3927_PCFG_SELSIO_ALL | (TX3927_PCFG_SELDMA_ALL & ~TX3927_PCFG_SELDMA(1)); - printk("TX3927 -- CRIR:%08lx CCFG:%08lx PCFG:%08lx\n", - tx3927_ccfgptr->crir, - tx3927_ccfgptr->ccfg, tx3927_ccfgptr->pcfg); - - /* TMR */ - for (i = 0; i < TX3927_NR_TMR; i++) - txx9_tmr_init(TX3927_TMR_REG(i)); - - /* DMA */ - tx3927_dmaptr->mcr = 0; - for (i = 0; i < ARRAY_SIZE(tx3927_dmaptr->ch); i++) { - /* reset channel */ - tx3927_dmaptr->ch[i].ccr = TX3927_DMA_CCR_CHRST; - tx3927_dmaptr->ch[i].ccr = 0; - } - /* enable DMA */ -#ifdef __BIG_ENDIAN - tx3927_dmaptr->mcr = TX3927_DMA_MCR_MSTEN; -#else - tx3927_dmaptr->mcr = TX3927_DMA_MCR_MSTEN | TX3927_DMA_MCR_LE; -#endif + tx3927_setup(); - /* PIO */ /* PIO[15:12] connected to LEDs */ __raw_writel(0x0000f000, &tx3927_pioptr->dir); - __raw_writel(0, &tx3927_pioptr->maskcpu); - __raw_writel(0, &tx3927_pioptr->maskext); - txx9_gpio_init(TX3927_PIO_REG, 0, 16); gpio_request(11, "dipsw1"); gpio_request(10, "dipsw2"); - { - unsigned int conf; - conf = read_c0_conf(); - if (!(conf & TX39_CONF_ICE)) - printk("TX3927 I-Cache disabled.\n"); - if (!(conf & TX39_CONF_DCE)) - printk("TX3927 D-Cache disabled.\n"); - else if (!(conf & TX39_CONF_WBON)) - printk("TX3927 D-Cache WriteThrough.\n"); - else if (!(conf & TX39_CONF_CWFON)) - printk("TX3927 D-Cache WriteBack.\n"); - else - printk("TX3927 D-Cache WriteBack (CWF) .\n"); - } + jmr3927_pci_setup(); + + /* SIO0 DTR on */ + jmr3927_ioc_reg_out(0, JMR3927_IOC_DTR_ADDR); + + jmr3927_led_set(0); + + printk(KERN_INFO + "JMR-TX3927 (Rev %d) --- IOC(Rev %d) DIPSW:%d,%d,%d,%d\n", + jmr3927_ioc_reg_in(JMR3927_IOC_BREV_ADDR) & JMR3927_REV_MASK, + jmr3927_ioc_reg_in(JMR3927_IOC_REV_ADDR) & JMR3927_REV_MASK, + jmr3927_dipsw1(), jmr3927_dipsw2(), + jmr3927_dipsw3(), jmr3927_dipsw4()); } /* This trick makes rtc-ds1742 driver usable as is. */ @@ -316,42 +189,21 @@ static unsigned long jmr3927_swizzle_addr_b(unsigned long port) #endif } -static int __init jmr3927_rtc_init(void) +static void __init jmr3927_rtc_init(void) { static struct resource __initdata res = { .start = JMR3927_IOC_NVRAMB_ADDR - IO_BASE, .end = JMR3927_IOC_NVRAMB_ADDR - IO_BASE + 0x800 - 1, .flags = IORESOURCE_MEM, }; - struct platform_device *dev; - dev = platform_device_register_simple("rtc-ds1742", -1, &res, 1); - return IS_ERR(dev) ? PTR_ERR(dev) : 0; -} - -/* Watchdog support */ - -static int __init txx9_wdt_init(unsigned long base) -{ - struct resource res = { - .start = base, - .end = base + 0x100 - 1, - .flags = IORESOURCE_MEM, - }; - struct platform_device *dev = - platform_device_register_simple("txx9wdt", -1, &res, 1); - return IS_ERR(dev) ? PTR_ERR(dev) : 0; -} - -static int __init jmr3927_wdt_init(void) -{ - return txx9_wdt_init(TX3927_TMR_REG(2)); + platform_device_register_simple("rtc-ds1742", -1, &res, 1); } static void __init jmr3927_device_init(void) { __swizzle_addr_b = jmr3927_swizzle_addr_b; jmr3927_rtc_init(); - jmr3927_wdt_init(); + tx3927_wdt_init(); } struct txx9_board_vec jmr3927_vec __initdata = { diff --git a/arch/mips/txx9/rbtx4927/irq.c b/arch/mips/txx9/rbtx4927/irq.c index cd748a93032..00cd5231da3 100644 --- a/arch/mips/txx9/rbtx4927/irq.c +++ b/arch/mips/txx9/rbtx4927/irq.c @@ -27,85 +27,86 @@ * 675 Mass Ave, Cambridge, MA 02139, USA. */ /* -IRQ Device -00 RBTX4927-ISA/00 -01 RBTX4927-ISA/01 PS2/Keyboard -02 RBTX4927-ISA/02 Cascade RBTX4927-ISA (irqs 8-15) -03 RBTX4927-ISA/03 -04 RBTX4927-ISA/04 -05 RBTX4927-ISA/05 -06 RBTX4927-ISA/06 -07 RBTX4927-ISA/07 -08 RBTX4927-ISA/08 -09 RBTX4927-ISA/09 -10 RBTX4927-ISA/10 -11 RBTX4927-ISA/11 -12 RBTX4927-ISA/12 PS2/Mouse (not supported at this time) -13 RBTX4927-ISA/13 -14 RBTX4927-ISA/14 IDE -15 RBTX4927-ISA/15 - -16 TX4927-CP0/00 Software 0 -17 TX4927-CP0/01 Software 1 -18 TX4927-CP0/02 Cascade TX4927-CP0 -19 TX4927-CP0/03 Multiplexed -- do not use -20 TX4927-CP0/04 Multiplexed -- do not use -21 TX4927-CP0/05 Multiplexed -- do not use -22 TX4927-CP0/06 Multiplexed -- do not use -23 TX4927-CP0/07 CPU TIMER - -24 TX4927-PIC/00 -25 TX4927-PIC/01 -26 TX4927-PIC/02 -27 TX4927-PIC/03 Cascade RBTX4927-IOC -28 TX4927-PIC/04 -29 TX4927-PIC/05 RBTX4927 RTL-8019AS ethernet -30 TX4927-PIC/06 -31 TX4927-PIC/07 -32 TX4927-PIC/08 TX4927 SerialIO Channel 0 -33 TX4927-PIC/09 TX4927 SerialIO Channel 1 -34 TX4927-PIC/10 -35 TX4927-PIC/11 -36 TX4927-PIC/12 -37 TX4927-PIC/13 -38 TX4927-PIC/14 -39 TX4927-PIC/15 -40 TX4927-PIC/16 TX4927 PCI PCI-C -41 TX4927-PIC/17 -42 TX4927-PIC/18 -43 TX4927-PIC/19 -44 TX4927-PIC/20 -45 TX4927-PIC/21 -46 TX4927-PIC/22 TX4927 PCI PCI-ERR -47 TX4927-PIC/23 TX4927 PCI PCI-PMA (not used) -48 TX4927-PIC/24 -49 TX4927-PIC/25 -50 TX4927-PIC/26 -51 TX4927-PIC/27 -52 TX4927-PIC/28 -53 TX4927-PIC/29 -54 TX4927-PIC/30 -55 TX4927-PIC/31 - -56 RBTX4927-IOC/00 FPCIB0 PCI-D PJ4/A PJ5/B SB/C PJ6/D PJ7/A (SouthBridge/NotUsed) [RTL-8139=PJ4] -57 RBTX4927-IOC/01 FPCIB0 PCI-C PJ4/D PJ5/A SB/B PJ6/C PJ7/D (SouthBridge/NotUsed) [RTL-8139=PJ5] -58 RBTX4927-IOC/02 FPCIB0 PCI-B PJ4/C PJ5/D SB/A PJ6/B PJ7/C (SouthBridge/IDE/pin=1,INTR) [RTL-8139=NotSupported] -59 RBTX4927-IOC/03 FPCIB0 PCI-A PJ4/B PJ5/C SB/D PJ6/A PJ7/B (SouthBridge/USB/pin=4) [RTL-8139=PJ6] -60 RBTX4927-IOC/04 -61 RBTX4927-IOC/05 -62 RBTX4927-IOC/06 -63 RBTX4927-IOC/07 - -NOTES: -SouthBridge/INTR is mapped to SouthBridge/A=PCI-B/#58 -SouthBridge/ISA/pin=0 no pci irq used by this device -SouthBridge/IDE/pin=1 no pci irq used by this device, using INTR via ISA IRQ14 -SouthBridge/USB/pin=4 using pci irq SouthBridge/D=PCI-A=#59 -SouthBridge/PMC/pin=0 no pci irq used by this device -SuperIO/PS2/Keyboard, using INTR via ISA IRQ1 -SuperIO/PS2/Mouse, using INTR via ISA IRQ12 (mouse not currently supported) -JP7 is not bus master -- do NOT use -- only 4 pci bus master's allowed -- SouthBridge, JP4, JP5, JP6 -*/ + * I8259A_IRQ_BASE+00 + * I8259A_IRQ_BASE+01 PS2/Keyboard + * I8259A_IRQ_BASE+02 Cascade RBTX4927-ISA (irqs 8-15) + * I8259A_IRQ_BASE+03 + * I8259A_IRQ_BASE+04 + * I8259A_IRQ_BASE+05 + * I8259A_IRQ_BASE+06 + * I8259A_IRQ_BASE+07 + * I8259A_IRQ_BASE+08 + * I8259A_IRQ_BASE+09 + * I8259A_IRQ_BASE+10 + * I8259A_IRQ_BASE+11 + * I8259A_IRQ_BASE+12 PS2/Mouse (not supported at this time) + * I8259A_IRQ_BASE+13 + * I8259A_IRQ_BASE+14 IDE + * I8259A_IRQ_BASE+15 + * + * MIPS_CPU_IRQ_BASE+00 Software 0 + * MIPS_CPU_IRQ_BASE+01 Software 1 + * MIPS_CPU_IRQ_BASE+02 Cascade TX4927-CP0 + * MIPS_CPU_IRQ_BASE+03 Multiplexed -- do not use + * MIPS_CPU_IRQ_BASE+04 Multiplexed -- do not use + * MIPS_CPU_IRQ_BASE+05 Multiplexed -- do not use + * MIPS_CPU_IRQ_BASE+06 Multiplexed -- do not use + * MIPS_CPU_IRQ_BASE+07 CPU TIMER + * + * TXX9_IRQ_BASE+00 + * TXX9_IRQ_BASE+01 + * TXX9_IRQ_BASE+02 + * TXX9_IRQ_BASE+03 Cascade RBTX4927-IOC + * TXX9_IRQ_BASE+04 + * TXX9_IRQ_BASE+05 RBTX4927 RTL-8019AS ethernet + * TXX9_IRQ_BASE+06 + * TXX9_IRQ_BASE+07 + * TXX9_IRQ_BASE+08 TX4927 SerialIO Channel 0 + * TXX9_IRQ_BASE+09 TX4927 SerialIO Channel 1 + * TXX9_IRQ_BASE+10 + * TXX9_IRQ_BASE+11 + * TXX9_IRQ_BASE+12 + * TXX9_IRQ_BASE+13 + * TXX9_IRQ_BASE+14 + * TXX9_IRQ_BASE+15 + * TXX9_IRQ_BASE+16 TX4927 PCI PCI-C + * TXX9_IRQ_BASE+17 + * TXX9_IRQ_BASE+18 + * TXX9_IRQ_BASE+19 + * TXX9_IRQ_BASE+20 + * TXX9_IRQ_BASE+21 + * TXX9_IRQ_BASE+22 TX4927 PCI PCI-ERR + * TXX9_IRQ_BASE+23 TX4927 PCI PCI-PMA (not used) + * TXX9_IRQ_BASE+24 + * TXX9_IRQ_BASE+25 + * TXX9_IRQ_BASE+26 + * TXX9_IRQ_BASE+27 + * TXX9_IRQ_BASE+28 + * TXX9_IRQ_BASE+29 + * TXX9_IRQ_BASE+30 + * TXX9_IRQ_BASE+31 + * + * RBTX4927_IRQ_IOC+00 FPCIB0 PCI-D (SouthBridge) + * RBTX4927_IRQ_IOC+01 FPCIB0 PCI-C (SouthBridge) + * RBTX4927_IRQ_IOC+02 FPCIB0 PCI-B (SouthBridge/IDE/pin=1,INTR) + * RBTX4927_IRQ_IOC+03 FPCIB0 PCI-A (SouthBridge/USB/pin=4) + * RBTX4927_IRQ_IOC+04 + * RBTX4927_IRQ_IOC+05 + * RBTX4927_IRQ_IOC+06 + * RBTX4927_IRQ_IOC+07 + * + * NOTES: + * SouthBridge/INTR is mapped to SouthBridge/A=PCI-B/#58 + * SouthBridge/ISA/pin=0 no pci irq used by this device + * SouthBridge/IDE/pin=1 no pci irq used by this device, using INTR + * via ISA IRQ14 + * SouthBridge/USB/pin=4 using pci irq SouthBridge/D=PCI-A=#59 + * SouthBridge/PMC/pin=0 no pci irq used by this device + * SuperIO/PS2/Keyboard, using INTR via ISA IRQ1 + * SuperIO/PS2/Mouse, using INTR via ISA IRQ12 (mouse not currently supported) + * JP7 is not bus master -- do NOT use -- only 4 pci bus master's + * allowed -- SouthBridge, JP4, JP5, JP6 + */ #include <linux/init.h> #include <linux/types.h> @@ -134,7 +135,7 @@ static int toshiba_rbtx4927_irq_nested(int sw_irq) level3 = readb(rbtx4927_imstat_addr) & 0x1f; if (level3) sw_irq = RBTX4927_IRQ_IOC + fls(level3) - 1; - return (sw_irq); + return sw_irq; } static void __init toshiba_rbtx4927_irq_ioc_init(void) diff --git a/arch/mips/txx9/rbtx4927/prom.c b/arch/mips/txx9/rbtx4927/prom.c index 5c0de54ebdd..1dc0a5b1956 100644 --- a/arch/mips/txx9/rbtx4927/prom.c +++ b/arch/mips/txx9/rbtx4927/prom.c @@ -38,4 +38,5 @@ void __init rbtx4927_prom_init(void) { prom_init_cmdline(); add_memory_region(0, tx4927_get_mem_size(), BOOT_MEM_RAM); + txx9_sio_putchar_init(TX4927_SIO_REG(0) & 0xfffffffffULL); } diff --git a/arch/mips/txx9/rbtx4927/setup.c b/arch/mips/txx9/rbtx4927/setup.c index 3da20ea3e55..0d39bafea79 100644 --- a/arch/mips/txx9/rbtx4927/setup.c +++ b/arch/mips/txx9/rbtx4927/setup.c @@ -46,12 +46,9 @@ #include <linux/kernel.h> #include <linux/types.h> #include <linux/ioport.h> -#include <linux/interrupt.h> -#include <linux/pm.h> #include <linux/platform_device.h> #include <linux/delay.h> #include <asm/io.h> -#include <asm/processor.h> #include <asm/reboot.h> #include <asm/txx9/generic.h> #include <asm/txx9/pci.h> @@ -103,6 +100,7 @@ static void __init tx4927_pci_setup(void) tx4927_report_pciclk(); tx4927_pcic_setup(tx4927_pcicptr, c, extarb); } + tx4927_setup_pcierr_irq(); } static void __init tx4937_pci_setup(void) @@ -149,6 +147,7 @@ static void __init tx4937_pci_setup(void) tx4938_report_pciclk(); tx4927_pcic_setup(tx4938_pcicptr, c, extarb); } + tx4938_setup_pcierr_irq(); } static void __init rbtx4927_arch_init(void) @@ -165,17 +164,8 @@ static void __init rbtx4937_arch_init(void) #define rbtx4937_arch_init NULL #endif /* CONFIG_PCI */ -static void __noreturn wait_forever(void) -{ - while (1) - if (cpu_wait) - (*cpu_wait)(); -} - static void toshiba_rbtx4927_restart(char *command) { - printk(KERN_NOTICE "System Rebooting...\n"); - /* enable the s/w reset register */ writeb(1, rbtx4927_softresetlock_addr); @@ -186,24 +176,8 @@ static void toshiba_rbtx4927_restart(char *command) /* do a s/w reset */ writeb(1, rbtx4927_softreset_addr); - /* do something passive while waiting for reset */ - local_irq_disable(); - wait_forever(); - /* no return */ -} - -static void toshiba_rbtx4927_halt(void) -{ - printk(KERN_NOTICE "System Halted\n"); - local_irq_disable(); - wait_forever(); - /* no return */ -} - -static void toshiba_rbtx4927_power_off(void) -{ - toshiba_rbtx4927_halt(); - /* no return */ + /* fallback */ + (*_machine_halt)(); } static void __init rbtx4927_clock_init(void); @@ -214,9 +188,6 @@ static void __init rbtx4927_mem_setup(void) u32 cp0_config; char *argptr; - /* f/w leaves this on at startup */ - clear_c0_status(ST0_ERL); - /* enable caches -- HCP5 does this, pmon does not */ cp0_config = read_c0_config(); cp0_config = cp0_config & ~(TX49_CONF_IC | TX49_CONF_DC); @@ -231,37 +202,21 @@ static void __init rbtx4927_mem_setup(void) } _machine_restart = toshiba_rbtx4927_restart; - _machine_halt = toshiba_rbtx4927_halt; - pm_power_off = toshiba_rbtx4927_power_off; #ifdef CONFIG_PCI txx9_alloc_pci_controller(&txx9_primary_pcic, RBTX4927_PCIMEM, RBTX4927_PCIMEM_SIZE, RBTX4927_PCIIO, RBTX4927_PCIIO_SIZE); + txx9_board_pcibios_setup = tx4927_pcibios_setup; #else set_io_port_base(KSEG1 + RBTX4927_ISA_IO_OFFSET); #endif - tx4927_setup_serial(); + tx4927_sio_init(0, 0); #ifdef CONFIG_SERIAL_TXX9_CONSOLE - argptr = prom_getcmdline(); - if (strstr(argptr, "console=") == NULL) { - strcat(argptr, " console=ttyS0,38400"); - } -#endif - -#ifdef CONFIG_ROOT_NFS - argptr = prom_getcmdline(); - if (strstr(argptr, "root=") == NULL) { - strcat(argptr, " root=/dev/nfs rw"); - } -#endif - -#ifdef CONFIG_IP_PNP - argptr = prom_getcmdline(); - if (strstr(argptr, "ip=") == NULL) { - strcat(argptr, " ip=any"); - } + argptr = prom_getcmdline(); + if (!strstr(argptr, "console=")) + strcat(argptr, " console=ttyS0,38400"); #endif } @@ -324,19 +279,17 @@ static void __init rbtx4927_time_init(void) tx4927_time_init(0); } -static int __init toshiba_rbtx4927_rtc_init(void) +static void __init toshiba_rbtx4927_rtc_init(void) { struct resource res = { .start = RBTX4927_BRAMRTC_BASE - IO_BASE, .end = RBTX4927_BRAMRTC_BASE - IO_BASE + 0x800 - 1, .flags = IORESOURCE_MEM, }; - struct platform_device *dev = - platform_device_register_simple("rtc-ds1742", -1, &res, 1); - return IS_ERR(dev) ? PTR_ERR(dev) : 0; + platform_device_register_simple("rtc-ds1742", -1, &res, 1); } -static int __init rbtx4927_ne_init(void) +static void __init rbtx4927_ne_init(void) { struct resource res[] = { { @@ -348,36 +301,14 @@ static int __init rbtx4927_ne_init(void) .flags = IORESOURCE_IRQ, } }; - struct platform_device *dev = - platform_device_register_simple("ne", -1, - res, ARRAY_SIZE(res)); - return IS_ERR(dev) ? PTR_ERR(dev) : 0; -} - -/* Watchdog support */ - -static int __init txx9_wdt_init(unsigned long base) -{ - struct resource res = { - .start = base, - .end = base + 0x100 - 1, - .flags = IORESOURCE_MEM, - }; - struct platform_device *dev = - platform_device_register_simple("txx9wdt", -1, &res, 1); - return IS_ERR(dev) ? PTR_ERR(dev) : 0; -} - -static int __init rbtx4927_wdt_init(void) -{ - return txx9_wdt_init(TX4927_TMR_REG(2) & 0xfffffffffULL); + platform_device_register_simple("ne", -1, res, ARRAY_SIZE(res)); } static void __init rbtx4927_device_init(void) { toshiba_rbtx4927_rtc_init(); rbtx4927_ne_init(); - rbtx4927_wdt_init(); + tx4927_wdt_init(); } struct txx9_board_vec rbtx4927_vec __initdata = { diff --git a/arch/mips/txx9/rbtx4938/irq.c b/arch/mips/txx9/rbtx4938/irq.c index 3971a061657..ca2f8306ce9 100644 --- a/arch/mips/txx9/rbtx4938/irq.c +++ b/arch/mips/txx9/rbtx4938/irq.c @@ -11,59 +11,57 @@ */ /* -IRQ Device - -16 TX4938-CP0/00 Software 0 -17 TX4938-CP0/01 Software 1 -18 TX4938-CP0/02 Cascade TX4938-CP0 -19 TX4938-CP0/03 Multiplexed -- do not use -20 TX4938-CP0/04 Multiplexed -- do not use -21 TX4938-CP0/05 Multiplexed -- do not use -22 TX4938-CP0/06 Multiplexed -- do not use -23 TX4938-CP0/07 CPU TIMER - -24 TX4938-PIC/00 -25 TX4938-PIC/01 -26 TX4938-PIC/02 Cascade RBTX4938-IOC -27 TX4938-PIC/03 RBTX4938 RTL-8019AS Ethernet -28 TX4938-PIC/04 -29 TX4938-PIC/05 TX4938 ETH1 -30 TX4938-PIC/06 TX4938 ETH0 -31 TX4938-PIC/07 -32 TX4938-PIC/08 TX4938 SIO 0 -33 TX4938-PIC/09 TX4938 SIO 1 -34 TX4938-PIC/10 TX4938 DMA0 -35 TX4938-PIC/11 TX4938 DMA1 -36 TX4938-PIC/12 TX4938 DMA2 -37 TX4938-PIC/13 TX4938 DMA3 -38 TX4938-PIC/14 -39 TX4938-PIC/15 -40 TX4938-PIC/16 TX4938 PCIC -41 TX4938-PIC/17 TX4938 TMR0 -42 TX4938-PIC/18 TX4938 TMR1 -43 TX4938-PIC/19 TX4938 TMR2 -44 TX4938-PIC/20 -45 TX4938-PIC/21 -46 TX4938-PIC/22 TX4938 PCIERR -47 TX4938-PIC/23 -48 TX4938-PIC/24 -49 TX4938-PIC/25 -50 TX4938-PIC/26 -51 TX4938-PIC/27 -52 TX4938-PIC/28 -53 TX4938-PIC/29 -54 TX4938-PIC/30 -55 TX4938-PIC/31 TX4938 SPI - -56 RBTX4938-IOC/00 PCI-D -57 RBTX4938-IOC/01 PCI-C -58 RBTX4938-IOC/02 PCI-B -59 RBTX4938-IOC/03 PCI-A -60 RBTX4938-IOC/04 RTC -61 RBTX4938-IOC/05 ATA -62 RBTX4938-IOC/06 MODEM -63 RBTX4938-IOC/07 SWINT -*/ + * MIPS_CPU_IRQ_BASE+00 Software 0 + * MIPS_CPU_IRQ_BASE+01 Software 1 + * MIPS_CPU_IRQ_BASE+02 Cascade TX4938-CP0 + * MIPS_CPU_IRQ_BASE+03 Multiplexed -- do not use + * MIPS_CPU_IRQ_BASE+04 Multiplexed -- do not use + * MIPS_CPU_IRQ_BASE+05 Multiplexed -- do not use + * MIPS_CPU_IRQ_BASE+06 Multiplexed -- do not use + * MIPS_CPU_IRQ_BASE+07 CPU TIMER + * + * TXX9_IRQ_BASE+00 + * TXX9_IRQ_BASE+01 + * TXX9_IRQ_BASE+02 Cascade RBTX4938-IOC + * TXX9_IRQ_BASE+03 RBTX4938 RTL-8019AS Ethernet + * TXX9_IRQ_BASE+04 + * TXX9_IRQ_BASE+05 TX4938 ETH1 + * TXX9_IRQ_BASE+06 TX4938 ETH0 + * TXX9_IRQ_BASE+07 + * TXX9_IRQ_BASE+08 TX4938 SIO 0 + * TXX9_IRQ_BASE+09 TX4938 SIO 1 + * TXX9_IRQ_BASE+10 TX4938 DMA0 + * TXX9_IRQ_BASE+11 TX4938 DMA1 + * TXX9_IRQ_BASE+12 TX4938 DMA2 + * TXX9_IRQ_BASE+13 TX4938 DMA3 + * TXX9_IRQ_BASE+14 + * TXX9_IRQ_BASE+15 + * TXX9_IRQ_BASE+16 TX4938 PCIC + * TXX9_IRQ_BASE+17 TX4938 TMR0 + * TXX9_IRQ_BASE+18 TX4938 TMR1 + * TXX9_IRQ_BASE+19 TX4938 TMR2 + * TXX9_IRQ_BASE+20 + * TXX9_IRQ_BASE+21 + * TXX9_IRQ_BASE+22 TX4938 PCIERR + * TXX9_IRQ_BASE+23 + * TXX9_IRQ_BASE+24 + * TXX9_IRQ_BASE+25 + * TXX9_IRQ_BASE+26 + * TXX9_IRQ_BASE+27 + * TXX9_IRQ_BASE+28 + * TXX9_IRQ_BASE+29 + * TXX9_IRQ_BASE+30 + * TXX9_IRQ_BASE+31 TX4938 SPI + * + * RBTX4938_IRQ_IOC+00 PCI-D + * RBTX4938_IRQ_IOC+01 PCI-C + * RBTX4938_IRQ_IOC+02 PCI-B + * RBTX4938_IRQ_IOC+03 PCI-A + * RBTX4938_IRQ_IOC+04 RTC + * RBTX4938_IRQ_IOC+05 ATA + * RBTX4938_IRQ_IOC+06 MODEM + * RBTX4938_IRQ_IOC+07 SWINT + */ #include <linux/init.h> #include <linux/interrupt.h> #include <asm/mipsregs.h> @@ -93,9 +91,6 @@ static int toshiba_rbtx4938_irq_nested(int sw_irq) return sw_irq; } -/**********************************************************************************/ -/* Functions for ioc */ -/**********************************************************************************/ static void __init toshiba_rbtx4938_irq_ioc_init(void) { diff --git a/arch/mips/txx9/rbtx4938/prom.c b/arch/mips/txx9/rbtx4938/prom.c index ee189519ce5..d73123cd2ab 100644 --- a/arch/mips/txx9/rbtx4938/prom.c +++ b/arch/mips/txx9/rbtx4938/prom.c @@ -22,4 +22,5 @@ void __init rbtx4938_prom_init(void) prom_init_cmdline(); #endif add_memory_region(0, tx4938_get_mem_size(), BOOT_MEM_RAM); + txx9_sio_putchar_init(TX4938_SIO_REG(0) & 0xfffffffffULL); } diff --git a/arch/mips/txx9/rbtx4938/setup.c b/arch/mips/txx9/rbtx4938/setup.c index 6c2b99bb8af..9ab48dec0fe 100644 --- a/arch/mips/txx9/rbtx4938/setup.c +++ b/arch/mips/txx9/rbtx4938/setup.c @@ -13,9 +13,6 @@ #include <linux/types.h> #include <linux/ioport.h> #include <linux/delay.h> -#include <linux/interrupt.h> -#include <linux/console.h> -#include <linux/pm.h> #include <linux/platform_device.h> #include <linux/gpio.h> @@ -28,33 +25,14 @@ #include <asm/txx9/spi.h> #include <asm/txx9pio.h> -static void rbtx4938_machine_halt(void) -{ - printk(KERN_NOTICE "System Halted\n"); - local_irq_disable(); - - while (1) - __asm__(".set\tmips3\n\t" - "wait\n\t" - ".set\tmips0"); -} - -static void rbtx4938_machine_power_off(void) -{ - rbtx4938_machine_halt(); - /* no return */ -} - static void rbtx4938_machine_restart(char *command) { local_irq_disable(); - - printk("Rebooting..."); writeb(1, rbtx4938_softresetlock_addr); writeb(1, rbtx4938_sfvol_addr); writeb(1, rbtx4938_softreset_addr); - while(1) - ; + /* fallback */ + (*_machine_halt)(); } static void __init rbtx4938_pci_setup(void) @@ -121,6 +99,7 @@ static void __init rbtx4938_pci_setup(void) register_pci_controller(c); tx4927_pcic_setup(tx4938_pcic1ptr, c, 0); } + tx4938_setup_pcierr_irq(); #endif /* CONFIG_PCI */ } @@ -151,19 +130,7 @@ static int __init rbtx4938_ethaddr_init(void) if (sum) printk(KERN_WARNING "seeprom: bad checksum.\n"); } - for (i = 0; i < 2; i++) { - unsigned int id = - TXX9_IRQ_BASE + (i ? TX4938_IR_ETH1 : TX4938_IR_ETH0); - struct platform_device *pdev; - if (!(__raw_readq(&tx4938_ccfgptr->pcfg) & - (i ? TX4938_PCFG_ETH1_SEL : TX4938_PCFG_ETH0_SEL))) - continue; - pdev = platform_device_alloc("tc35815-mac", id); - if (!pdev || - platform_device_add_data(pdev, &dat[4 + 6 * i], 6) || - platform_device_add(pdev)) - platform_device_put(pdev); - } + tx4938_ethaddr_init(&dat[4], &dat[4 + 6]); #endif /* CONFIG_PCI */ return 0; } @@ -193,51 +160,36 @@ static void __init rbtx4938_mem_setup(void) #ifdef CONFIG_PCI txx9_alloc_pci_controller(&txx9_primary_pcic, 0, 0, 0, 0); + txx9_board_pcibios_setup = tx4927_pcibios_setup; #else set_io_port_base(RBTX4938_ETHER_BASE); #endif - tx4938_setup_serial(); + tx4938_sio_init(7372800, 0); #ifdef CONFIG_SERIAL_TXX9_CONSOLE - argptr = prom_getcmdline(); - if (strstr(argptr, "console=") == NULL) { - strcat(argptr, " console=ttyS0,38400"); - } + argptr = prom_getcmdline(); + if (!strstr(argptr, "console=")) + strcat(argptr, " console=ttyS0,38400"); #endif #ifdef CONFIG_TOSHIBA_RBTX4938_MPLEX_PIO58_61 - printk("PIOSEL: disabling both ata and nand selection\n"); - local_irq_disable(); + printk(KERN_INFO "PIOSEL: disabling both ata and nand selection\n"); txx9_clear64(&tx4938_ccfgptr->pcfg, TX4938_PCFG_NDF_SEL | TX4938_PCFG_ATA_SEL); #endif #ifdef CONFIG_TOSHIBA_RBTX4938_MPLEX_NAND - printk("PIOSEL: enabling nand selection\n"); + printk(KERN_INFO "PIOSEL: enabling nand selection\n"); txx9_set64(&tx4938_ccfgptr->pcfg, TX4938_PCFG_NDF_SEL); txx9_clear64(&tx4938_ccfgptr->pcfg, TX4938_PCFG_ATA_SEL); #endif #ifdef CONFIG_TOSHIBA_RBTX4938_MPLEX_ATA - printk("PIOSEL: enabling ata selection\n"); + printk(KERN_INFO "PIOSEL: enabling ata selection\n"); txx9_set64(&tx4938_ccfgptr->pcfg, TX4938_PCFG_ATA_SEL); txx9_clear64(&tx4938_ccfgptr->pcfg, TX4938_PCFG_NDF_SEL); #endif -#ifdef CONFIG_IP_PNP - argptr = prom_getcmdline(); - if (strstr(argptr, "ip=") == NULL) { - strcat(argptr, " ip=any"); - } -#endif - - -#ifdef CONFIG_FB - { - conswitchp = &dummy_con; - } -#endif - rbtx4938_spi_setup(); pcfg = ____raw_readq(&tx4938_ccfgptr->pcfg); /* updated */ /* fixup piosel */ @@ -258,11 +210,9 @@ static void __init rbtx4938_mem_setup(void) rbtx4938_fpga_resource.end = CPHYSADDR(RBTX4938_FPGA_REG_ADDR) + 0xffff; rbtx4938_fpga_resource.flags = IORESOURCE_MEM | IORESOURCE_BUSY; if (request_resource(&txx9_ce_res[2], &rbtx4938_fpga_resource)) - printk("request resource for fpga failed\n"); + printk(KERN_ERR "request resource for fpga failed\n"); _machine_restart = rbtx4938_machine_restart; - _machine_halt = rbtx4938_machine_halt; - pm_power_off = rbtx4938_machine_power_off; writeb(0xff, rbtx4938_led_addr); printk(KERN_INFO "RBTX4938 --- FPGA(Rev %02x) DIPSW:%02x,%02x\n", @@ -270,7 +220,7 @@ static void __init rbtx4938_mem_setup(void) readb(rbtx4938_dipsw_addr), readb(rbtx4938_bdipsw_addr)); } -static int __init rbtx4938_ne_init(void) +static void __init rbtx4938_ne_init(void) { struct resource res[] = { { @@ -282,10 +232,7 @@ static int __init rbtx4938_ne_init(void) .flags = IORESOURCE_IRQ, } }; - struct platform_device *dev = - platform_device_register_simple("ne", -1, - res, ARRAY_SIZE(res)); - return IS_ERR(dev) ? PTR_ERR(dev) : 0; + platform_device_register_simple("ne", -1, res, ARRAY_SIZE(res)); } static DEFINE_SPINLOCK(rbtx4938_spi_gpio_lock); @@ -321,24 +268,6 @@ static struct gpio_chip rbtx4938_spi_gpio_chip = { .ngpio = 3, }; -/* SPI support */ - -static void __init txx9_spi_init(unsigned long base, int irq) -{ - struct resource res[] = { - { - .start = base, - .end = base + 0x20 - 1, - .flags = IORESOURCE_MEM, - }, { - .start = irq, - .flags = IORESOURCE_IRQ, - }, - }; - platform_device_register_simple("spi_txx9", 0, - res, ARRAY_SIZE(res)); -} - static int __init rbtx4938_spi_init(void) { struct spi_board_info srtc_info = { @@ -361,7 +290,7 @@ static int __init rbtx4938_spi_init(void) gpio_direction_output(16 + SEEPROM2_CS, 1); gpio_request(16 + SEEPROM3_CS, "seeprom3"); gpio_direction_output(16 + SEEPROM3_CS, 1); - txx9_spi_init(TX4938_SPI_REG & 0xfffffffffULL, RBTX4938_IRQ_IRC_SPI); + tx4938_spi_init(0); return 0; } @@ -372,30 +301,11 @@ static void __init rbtx4938_arch_init(void) rbtx4938_spi_init(); } -/* Watchdog support */ - -static int __init txx9_wdt_init(unsigned long base) -{ - struct resource res = { - .start = base, - .end = base + 0x100 - 1, - .flags = IORESOURCE_MEM, - }; - struct platform_device *dev = - platform_device_register_simple("txx9wdt", -1, &res, 1); - return IS_ERR(dev) ? PTR_ERR(dev) : 0; -} - -static int __init rbtx4938_wdt_init(void) -{ - return txx9_wdt_init(TX4938_TMR_REG(2) & 0xfffffffffULL); -} - static void __init rbtx4938_device_init(void) { rbtx4938_ethaddr_init(); rbtx4938_ne_init(); - rbtx4938_wdt_init(); + tx4938_wdt_init(); } struct txx9_board_vec rbtx4938_vec __initdata = { |